CDCVF2509 Search Results

PC133 registered reference design

Contextual Info: CDCF2509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS624C − APRIL 1999 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D D D D PW PACKAGE TOP VIEW this Device Designed to Meet PC133 SDRAM Registered DIMM Specification Rev. 0.9

Contextual Info: CDCVF2509 3.3-V PHASE-LOCK LOOP CLOCK DRIVER SCAS637B – DECEMBER 1999 – REVISED JULY 2001 D D D D D D D D D D D D D D PW PACKAGE TOP VIEW Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification Rev. 1.1 Spread Spectrum Clock Compatible

Contextual Info: CDC509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS576C − JULY 1996 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D NOT RECOMMENDED FOR NEW DESIGNS this Device Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications

PC133 registered reference design

Contextual Info: CDCVF2509A www.ti.com SCAS765A – APRIL 2004 – REVISED JULY 2004 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE FEATURES FEATURES • • • • • • • • • • • • • • • • • • Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification

PC133 registered reference design

Contextual Info: CDCVF2509A www.ti.com SCAS765B – APRIL 2004 – REVISED JUNE 2005 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • • Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification

CDC2509

Abstract: CDC2510A
Contextual Info: CDC2509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS580C − OCTOBER 1996 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D this Device Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications Distributes One Clock Input to One Bank of

CDC509

Abstract: CDC509PWR CDC509PWRG4 CDCVF2509A MTSS001C
Contextual Info: CDC509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS576C − JULY 1996 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D NOT RECOMMENDED FOR NEW DESIGNS this Device Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications

CDCVF2509A

Abstract: CDCVF2509APW CDCVF2509APWR PC133 registered reference design
Contextual Info: CDCVF2509A www.ti.com SCAS765A – APRIL 2004 – REVISED JULY 2004 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE FEATURES FEATURES • • • • • • • • • • • • • • • • • • Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification

CDCF2509

Abstract: CDCF2509PWR CDCVF2509A PC133 registered reference design CDC2509
Contextual Info: CDCF2509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS624C − APRIL 1999 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D D D D PW PACKAGE TOP VIEW this Device Designed to Meet PC133 SDRAM Registered DIMM Specification Rev. 0.9

Contextual Info: CDC2509C 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS620A − DECEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D D D D D PW PACKAGE TOP VIEW this Device Designed to Meet PC SDRAM Registered DIMM Design Support Document Rev. 1.2

Contextual Info: CDC2509A 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS603C − APRIL 1998 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D PW PACKAGE TOP VIEW this Device Spread Spectrum Clock Compatible 100-MHz Maximum Frequency Available in Plastic 24-Pin TSSOP

PC133 registered reference design

Contextual Info: CDCVF2509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS637C − DECEMBER 1999 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification Rev. 1.1

Contextual Info: CDC2509C 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS620A − DECEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D D D D D PW PACKAGE TOP VIEW this Device Designed to Meet PC SDRAM Registered DIMM Design Support Document Rev. 1.2

Contextual Info: CDC2509A 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS603C − APRIL 1998 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D PW PACKAGE TOP VIEW this Device Spread Spectrum Clock Compatible 100-MHz Maximum Frequency Available in Plastic 24-Pin TSSOP

PC133 registered reference design

Contextual Info: CDCVF2509A www.ti.com SCAS765E – APRIL 2004 – REVISED FEBRUARY 2010 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE Check for Samples: CDCVF2509A FEATURES 1 • • • • • • • • • • • • Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification

Contextual Info: CDC509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS576C − JULY 1996 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D NOT RECOMMENDED FOR NEW DESIGNS this Device Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications

Contextual Info: NOT RECOMMENDED FOR NEW DESIGNS, USE CDCVF2509A AS A REPLACEMENT CDCVF2509 www.ti.com SCAS737D – APRIL 2004 – REVISED FEBRUARY 2010 3.3-V PHASE-LOCK LOOP CLOCK DRIVER Check for Samples: CDCVF2509 FEATURES 1 • • • • • • • • • • • •

Contextual Info: CDC2509B 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS613C − SEPTEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D D D D D this Device Designed to Meet PC SDRAM Registered DIMM Specification Spread Spectrum Clock Compatible

CDC2509

Abstract: CDC2510A
Contextual Info: CDC2509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS580C − OCTOBER 1996 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D this Device Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications Distributes One Clock Input to One Bank of

Contextual Info: CDC2509C 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS620A − DECEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D D D D D PW PACKAGE TOP VIEW this Device Designed to Meet PC SDRAM Registered DIMM Design Support Document Rev. 1.2

Contextual Info: CDC509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS576C − JULY 1996 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D NOT RECOMMENDED FOR NEW DESIGNS this Device Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications

PC133 registered reference design

Contextual Info: CDCVF2509A www.ti.com SCAS765B – APRIL 2004 – REVISED JUNE 2005 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH POWER DOWN MODE FEATURES APPLICATIONS • • • • • • • • • • • • • • • • • • Designed to Meet and Exceed PC133 SDRAM Registered DIMM Specification

Contextual Info: CDC2509C 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS620A − DECEMBER 1998 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D D D D D D D PW PACKAGE TOP VIEW this Device Designed to Meet PC SDRAM Registered DIMM Design Support Document Rev. 1.2

CDC2509

Abstract: CDC2510A
Contextual Info: CDC2509 3.3ĆV PHASEĆLOCK LOOP CLOCK DRIVER ą SCAS580C − OCTOBER 1996 − REVISED DECEMBER 2004 D Use CDCVF2509A as a Replacement for D D D D D D D D this Device Phase-Lock Loop Clock Distribution for Synchronous DRAM Applications Distributes One Clock Input to One Bank of