CDCV857 Search Results

CDCV857

Abstract: CDCV857A
Contextual Info: CDCV857A 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS667 – APRIL 2001 D D D D D D D D D D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 180 MHz Low Jitter cyc–cyc : ±50 ps

TI Cross Reference Search

Abstract: CDCV857 CDCV857DGG CDCV857DGGR CDCV857DGGRG4
Contextual Info: CDCV857 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS645A – AUGUST 2000 – REVISED OCTOBER 2000 D D D D D D D D D D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 200 MHz

CDCV857

Abstract: CDCV857A
Contextual Info: CDCV857A 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS667A – APRIL 2001 – REVISED AUGUST 2002 D D D D D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 180 MHz Low Jitter cyc–cyc : ±50 ps

Contextual Info: CDCV857B 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS676 – JUNE 2002 D Phase-Lock Loop Clock Driver for Double D D D D D description GND Y0 Y0 VDDQ Y1 Y1 GND GND Y2 Y2 VDDQ VDDQ CLK CLK VDDQ AVDD AGND GND Y3 Y3 VDDQ Y4 Y4 GND 1 48 2 47 3 46 4 45 5 44 6 43 7 42

CDCV857

Abstract: CDCV857A CDCV857ADGG CDCV857ADGGG4 CDCV857ADGGR
Contextual Info: CDCV857A 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS667A – APRIL 2001 – REVISED AUGUST 2002 D D D D D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 180 MHz Low Jitter cyc–cyc : ±50 ps

Contextual Info: CDCV857B, CDCV857BI 2.5ĆV PHASEĆLOCK LOOP CLOCK DRIVER SCAS689 − FEBRUARY 2003 D Phase-Lock Loop Clock Driver for Double D D D D D D D Enters Low-Power Mode When No CLK Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 MHz to 200 MHz

Contextual Info: CDCV857B, CDCV857BI 2.5ĆV PHASEĆLOCK LOOP CLOCK DRIVER SCAS689 − FEBRUARY 2003 D Phase-Lock Loop Clock Driver for Double D D D D D D D Enters Low-Power Mode When No CLK Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 MHz to 200 MHz

Contextual Info: CDCV857B, CDCV857BI 2.5-V PHASE-LOCK LOOP CLOCK DRIVER SCAS689A − FEBRUARY 2003 − REVISED NOVEMBER 2010 D Phase-Lock Loop Clock Driver for Double D D D D D D D Enters Low-Power Mode When No CLK Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible

CDCV857B

Abstract: CDCV857BDGG CDCV857BGQL CDCV857BI CDCV857BIGG DSA00985
Contextual Info: CDCV857B, CDCV857BI 2.5-V PHASE-LOCK LOOP CLOCK DRIVER SCAS689 – FEBRUARY 2003 D Phase-Lock Loop Clock Driver for Double D D D D D D D Enters Low-Power Mode When No CLK Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 MHz to 200 MHz

Contextual Info: CDCV857B, CDCV857BI 2.5-V PHASE-LOCK LOOP CLOCK DRIVER SCAS676A – JUNE 2002 – REVISED NOVEMBER 2002 D Phase-Lock Loop Clock Driver for Double D D D D D D D D D D D D Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 MHz to 200 MHz

CDCV857

Abstract: CDCV857A CDCV857B CDCVF857
Contextual Info: CDCV857 FAMILY QUICK CHART Parameter CDCVF857 CDCV857B CDCV857 CDCV857A 2.3 - 2.7 2.3 - 2.7 2.3 - 2.7 2.3 - 2.7 C-C Jitter ps ± 50 ± 50 ± 75 ± 50 Half Period Jitter (ps) ± 75 ± 75 ± 100 ± 75 Period Jitter (ps) ± 35 ± 35 ± 75 ± 35 Output Skew (ps)

CDCV857

Contextual Info: CDCV857 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS645A – AUGUST 2000 – REVISED OCTOBER 2000 D D D D D D D D D D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 200 MHz

Contextual Info: CDCV857B, CDCV857BI 2.5ĆV PHASEĆLOCK LOOP CLOCK DRIVER SCAS689 − FEBRUARY 2003 D Phase-Lock Loop Clock Driver for Double D D D D D D D Enters Low-Power Mode When No CLK Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 MHz to 200 MHz

Contextual Info: CDCV857A 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS667A – APRIL 2001 – REVISED AUGUST 2002 D D D D D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 180 MHz Low Jitter cyc–cyc : ±50 ps

CDCV857B

Abstract: CDCV857BDGG CDCV857BDGGR CDCV857BDGGRG4 CDCV857BGQL CDCV857BGQLR CDCV857BI CDCV857BIGG
Contextual Info: CDCV857B, CDCV857BI 2.5ĆV PHASEĆLOCK LOOP CLOCK DRIVER SCAS689 − FEBRUARY 2003 D Phase-Lock Loop Clock Driver for Double D D D D D D D Enters Low-Power Mode When No CLK Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 MHz to 200 MHz

CDCV857

Abstract: CDCV857DGG CDCV857DGGG4 CDCV857DGGR CDCV857DGGRG4
Contextual Info: CDCV857 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS645A – AUGUST 2000 – REVISED OCTOBER 2000 D D D D D D D D D D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 200 MHz

Contextual Info: CDCV857B, CDCV857BI 2.5ĆV PHASEĆLOCK LOOP CLOCK DRIVER SCAS689 − FEBRUARY 2003 D Phase-Lock Loop Clock Driver for Double D D D D D D D Enters Low-Power Mode When No CLK Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 MHz to 200 MHz

CDCV857

Abstract: CDCV857DGG CDCV857DGGG4 CDCV857DGGR CDCV857DGGRG4
Contextual Info: CDCV857 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS645A – AUGUST 2000 – REVISED OCTOBER 2000 D D D D D D D D D D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 200 MHz

Contextual Info: CDCV857B, CDCV857BI 2.5-V PHASE-LOCK LOOP CLOCK DRIVER SCAS689A − FEBRUARY 2003 − REVISED NOVEMBER 2010 D Enters Low-Power Mode When No CLK D Phase-Lock Loop Clock Driver for Double D D D D D D Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible

CDC857

Abstract: CDCV850 CDCV857 CDCV857A HFS9003 TDS694C
Contextual Info: Application Report SCAA054 – January 2002 Design Considerations for TI’s CDCV857/CDCV857A DDR PLL Dung Nguyen and Kal Mustafa HPA/CDC ABSTRACT This application is a general guide for using Texas Instruments CDCV857/CDCV857A double data rate DDR clock driver. This report presents methods for using the device

CDC2509

Abstract: SN65MLVD201 CDCFR83 CDCR61A CDCR83 CDCU877 CDCV850 CDCV855 CDCV857B CDCVF857
Contextual Info: Clock Selection by Speed and Signaling Type Click on a part number for a direct link to the online product folder, or visit www.ti.com/clocks Signal Type SSTL-2/RSL DDR/Rambus CDCV850 LVPECL/LVDS MLVDS/CML CDCV855 CDCV857B CDCVF857 CDCU877 CDCR61A CDCR83

Contextual Info: CDCV857B, CDCV857BI 2.5ĆV PHASEĆLOCK LOOP CLOCK DRIVER SCAS689 − FEBRUARY 2003 D Phase-Lock Loop Clock Driver for Double D D D D D D D Enters Low-Power Mode When No CLK Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 MHz to 200 MHz

SCAA048

Contextual Info: CDCV857A 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS667A – APRIL 2001 – REVISED AUGUST 2002 D D D D D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 180 MHz Low Jitter cyc–cyc : ±50 ps

h d 2001

Abstract: TI Cross Reference Search CDCV857 CDCV857A CDCV857ADGG CDCV857ADGGR CDCV857AGQLR
Contextual Info: CDCV857A 2.5-V PHASE LOCK LOOP CLOCK DRIVER SCAS667A – APRIL 2001 – REVISED AUGUST 2002 D D D D D Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 180 MHz Low Jitter cyc–cyc : ±50 ps