CD74HC08EP Search Results

Contextual Info: CD74HC08-EP QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS477 – APRIL 2003 D D D D D D D D D Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources DMS Support

Contextual Info: [ /Title CD54H C08, CD54H CT08, CD74H C08, CD74H CT08 /Subject (High CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 Data sheet acquired from Harris Semiconductor SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description

Contextual Info: [ /Title CD54H C08, CD54H CT08, CD74H C08, CD74H CT08 /Subject (High CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 Data sheet acquired from Harris Semiconductor SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description

CD74HC08

Abstract: CD74HC08MM96EP CD74HC08-Q1 CD74HC08QM96EP Texas Instruments TTL integrated circuits catalog
Contextual Info: CD74HC08ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS477B − APRIL 2003 − REVISED APRIL 2004 D Controlled Baseline D D D D D D D D Balanced Propagation Delay and Transition − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of Up

cd74hc08

Contextual Info: [ /Title CD54H C08, CD54H CT08, CD74H C08, CD74H CT08 /Subject (High CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 Data sheet acquired from Harris Semiconductor SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description

Contextual Info: CD74HC08ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS477B − APRIL 2003 − REVISED APRIL 2004 D Controlled Baseline D D D D D D D D Balanced Propagation Delay and Transition − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of Up

Contextual Info: [ /Title CD54H C08, CD54H CT08, CD74H C08, CD74H CT08 /Subject (High CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 Data sheet acquired from Harris Semiconductor SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description

Contextual Info: [ /Title CD54H C08, CD54H CT08, CD74H C08, CD74H CT08 /Subject (High CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 Data sheet acquired from Harris Semiconductor SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description

Contextual Info: CD74HC08-Q1 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCLS512A − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D D 2-V to 6-V VCC Operation D High Noise Immunity NIL or NIH = 30% of MIL-STD-883, Method 3015; Exceeds 200 V

74HCT

Abstract: 74LS CD54HC08 CD54HCT08 CD74HC08 CD74HCT08 CT08
Contextual Info: [ /Title CD54H C08, CD54H CT08, CD74H C08, CD74H CT08 /Subject (High CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 Data sheet acquired from Harris Semiconductor SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description

CD54HC08

Abstract: CD74HC08 CD74HC08-Q1 CD74HC08QM96G4Q1 CD74HC08QM96Q1
Contextual Info: CD74HC08ĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATE SCLS512A − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D D 2-V to 6-V VCC Operation D High Noise Immunity NIL or NIH = 30% of

Contextual Info: CD74HC08ĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆAND GATE SCLS512A − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D D 2-V to 6-V VCC Operation D High Noise Immunity NIL or NIH = 30% of

74HCT 2-input AND gate

Contextual Info: [ /Title CD54H C08, CD54H CT08, CD74H C08, CD74H CT08 /Subject (High CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 Data sheet acquired from Harris Semiconductor SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description

Contextual Info: CD74HC08-Q1 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCLS512A − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D D 2-V to 6-V VCC Operation D High Noise Immunity NIL or NIH = 30% of MIL-STD-883, Method 3015; Exceeds 200 V

Texas Instruments TTL integrated circuits catalog

Contextual Info: CD74HC08ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS477B − APRIL 2003 − REVISED APRIL 2004 D Controlled Baseline D D D D D D D D Balanced Propagation Delay and Transition − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of Up

Contextual Info: CD74HC08ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS477B − APRIL 2003 − REVISED APRIL 2004 D Controlled Baseline D D D D D D D D Balanced Propagation Delay and Transition − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of Up

Contextual Info: CD74HC08ĆEP QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES SCLS477B − APRIL 2003 − REVISED APRIL 2004 D Controlled Baseline D D D D D D D D Balanced Propagation Delay and Transition − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of Up

Contextual Info: [ /Title CD54H C08, CD54H CT08, CD74H C08, CD74H CT08 /Subject (High CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 Data sheet acquired from Harris Semiconductor SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description

74HCT

Abstract: 74LS CD54HC08 CD54HCT08 CD74HC08 CD74HCT08 CT08
Contextual Info: [ /Title CD54H C08, CD54H CT08, CD74H C08, CD74H CT08 /Subject (High CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 Data sheet acquired from Harris Semiconductor SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description

74HCT

Abstract: 74LS CD54HC08 CD54HCT08 CD74HC08 CD74HCT08 CT08
Contextual Info: [ /Title CD54H C08, CD54H CT08, CD74H C08, CD74H CT08 /Subject (High CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 Data sheet acquired from Harris Semiconductor SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description

Contextual Info: CD74HC08-Q1 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCLS512A − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D D 2-V to 6-V VCC Operation D High Noise Immunity NIL or NIH = 30% of MIL-STD-883, Method 3015; Exceeds 200 V