CD4027BMN Search Results

CD4027BMN Datasheets (1)

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National Semiconductor

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
CD4027BMN		National Semiconductor	Dual J-K Master/Slave Flip-Flop with Set and Reset	Scan	PDF	171.31KB	6

CD4027BMN Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
5958 Abstract: 74LS AN-90 C1995 CD4027B CD4027BC CD4027BCJ CD4027BM CD4027BMJ J16A Contextual Info: CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset General Description Features These dual J-K flip-flops are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors Each flip-flop has	Original	cd4027bm cd4027bc 5958 74ls +6an-90 c1995 cd4027b cd4027bcj cd4027bmj j16a	PDF
74LS Abstract: AN-90 CD4027B CD4027BC CD4027BCJ CD4027BM CD4027BMN J16A CD4027BCN Contextual Info: & February 1988 Semiconductor CD4027BM/CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset Features • Wide supply voltage range ■ High noise immunity ■ Low power TTL compatibility ■ Low power ■ Medium speed operation 3.0V to 15V 0.45 VDD typ.	OCR Scan	cd4027bm/cd4027bc 74ls an-90 cd4027b +6cd4027bc cd4027bcj cd4027bm cd4027bmn j16a cd4027bcn	PDF
Contextual Info: February 1988 CD4027BM/CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset General Description Features These dual J-K flip-flops are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. Each flip-flop has	OCR Scan	cd4027bm/cd4027bc	PDF
74LS Abstract: AN-90 CD4027B CD4027BC CD4027BCJ CD4027BM CD4027BMN J16A Contextual Info: & February 1988 Semiconductor CD4027BM/CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset Features • Wide supply voltage range ■ High noise immunity ■ Low power TTL compatibility ■ Low power ■ Medium speed operation 3.0V to 15V 0.45 VDD typ.	OCR Scan	cd4027bm/cd4027bc 74ls an-90 cd4027b +5cd4027bc cd4027bcj cd4027bm cd4027bmn j16a	PDF