CASE966 Search Results

948F

Abstract: MC74AC174 MC74AC174D MC74AC174DR2 MC74AC174N MC74ACT174 MC74ACT174D MC74ACT174N
Contextual Info: MC74AC174, MC74ACT174 Hex D Flip-Flop with Master Reset The MC74AC174/74ACT174 is a high–speed hex D flip–flop. The device is used primarily as a 6–bit edge–triggered storage register. The information on the D inputs is transferred to storage during the

ACT153

Abstract: MC74AC153 MC74AC153DR2 MC74AC153DT MC74AC153DTR2 MC74ACT153 MC74ACT153D MC74ACT153DR2 MC74ACT153DT ZA EA Marking
Contextual Info: MC74AC153, MC74ACT153 Dual 4-Input Multiplexer The MC74AC153/74ACT153 is a high–speed dual 4–input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of data from four sources. The two buffered outputs present data in the true non–inverted form. In

948F

Abstract: MC74AC253 MC74AC253D MC74AC253DR2 MC74AC253N MC74ACT253 MC74ACT253D MC74ACT253N
Contextual Info: MC74AC253, MC74ACT253 Dual 4−Input Multiplexer with 3−State Outputs The MC74AC253/74ACT253 is a dual 4−input multiplexer with 3−state outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a

948F

Abstract: MC74AC109 MC74AC109D MC74AC109N MC74ACT109 MC74ACT109D MC74ACT109N
Contextual Info: MC74AC109, MC74ACT109 Dual JK Positive Edge−Triggered Flip−Flop The MC74AC109/74ACT109 consists of two high−speed completely independent transition clocked JK flip−flops. The clocking operation is independent of rise and fall times of the clock waveform.

74xx138

Abstract: 74xx163
Contextual Info: MC74AC02, MC74ACT02 Quad 2-Input NOR Gate • Outputs Source/Sink 24 mA • ′ACT02 Has TTL Compatible Inputs VCC 14 http://onsemi.com 13 12 11 10 9 8 PDIP–14 N SUFFIX CASE 646 14 1 1 2 3 4 5 6 7 SO–14 D SUFFIX CASE 751A 14 1 GND Figure 1. Pinout: 14–Lead Packages Conductors

Contextual Info: MC74AC139, MC74ACT139 Dual 1−of−4 Decoder/Demultiplexer The MC74AC139/74ACT139 is a high−speed, dual 1−of−4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually−exclusive active−LOW outputs. Each decoder has an active−LOW Enable input

Contextual Info: MC74AC153, MC74ACT153 Dual 4−Input Multiplexer The MC74AC153/74ACT153 is a high−speed dual 4−input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of data from four sources. The two buffered outputs present data in the true non−inverted form. In

10h125

Abstract: MC10H125 MC10H125FN MC10H125L MC10H125M MC10H125MEL MC10H125P PLCC-20 MC10H125-D
Contextual Info: MC10H125 Quad MECL−to−TTL Translator The MC10H125 is a quad translator for interfacing data and control signals between the MECL section and saturated logic section of digital systems. The 10H part is a functional/pinout duplication of the standard MECL 10K family part, with 100% improvement in

948F

Abstract: ACT257 MC74AC257 MC74AC257D MC74AC257DR2 MC74AC257N MC74ACT257 MC74ACT257D MC74ACT257N
Contextual Info: MC74AC257, MC74ACT257 Quad 2-Input Multiplexer with 3-State Outputs The MC74AC257/74ACT257 is a quad 2–input multiplexer with 3–state outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present the

B ZA 01

Abstract: 948F ACT153 MC74AC153 MC74AC153D MC74AC153DR2 MC74AC153N MC74ACT153 MC74ACT153D MC74ACT153N
Contextual Info: MC74AC153, MC74ACT153 Dual 4−Input Multiplexer The MC74AC153/74ACT153 is a high−speed dual 4−input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of data from four sources. The two buffered outputs present data in the true non−inverted form. In

74AC4040

Abstract: 948F MC74AC4040 MC74AC4040D MC74AC4040DR2 MC74AC4040DT MC74AC4040DTR2 MC74AC4040M MC74AC4040N
Contextual Info: MC74AC4040 12−Stage Binary Ripple Counter The MC74AC4040 consists of 12 master-slave flip-flops. The output of each flip-flop feeds the next and the frequency at each output is half that of the preceding one. The state of the counter advances on the negative-going edge of the Clock input. Reset is asynchronous and

948F

Abstract: MC74AC175 MC74AC175D MC74AC175DR2 MC74AC175N MC74ACT175 MC74ACT175D MC74ACT175N Q2101
Contextual Info: MC74AC175, MC74ACT175 Quad D Flip-Flop With Master Reset The MC74AC/ACT175 is a high–speed quad D flip–flop. The device is useful for general flip–flop requirements where clock and clear inputs are common. The information on the D inputs is transferred to storage during the LOW–to–HIGH clock transition.

948F

Abstract: MC74AC174 MC74AC174D MC74AC174DR2 MC74AC174N MC74ACT174 MC74ACT174D MC74ACT174N
Contextual Info: MC74AC174, MC74ACT174 Hex D Flip−Flop with Master Reset The MC74AC174/74ACT174 is a high−speed hex D flip−flop. The device is used primarily as a 6−bit edge−triggered storage register. The information on the D inputs is transferred to storage during the

act 138

Abstract: MC74ACT138
Contextual Info: MC74AC138, MC74ACT138 1-of-8 Decoder/Demultiplexer The MC74AC138/74ACT138 is a high–speed 1–of–8 decoder/demultiplexer . This device is ideally suited for high–speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1–of–24

Contextual Info: MC74AC259, MC74ACT259 8−Bit Addressable Latch The MC74AC259/74ACT259 is a high−speed 8−bit addressable latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable of storing single line data in eight addressable latches, and also a 1−of−8 decoder and

Contextual Info: MC74AC253, MC74ACT253 Dual 4−Input Multiplexer with 3−State Outputs The MC74AC253/74ACT253 is a dual 4−input multiplexer with 3−state outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a

948F

Abstract: ACT161 ACT163 MC74AC161 MC74AC163 MC74ACT161 MC74ACT163
Contextual Info: MC74AC161, MC74ACT161, MC74AC163, MC74ACT163 Synchronous Presettable Binary Counter The MC74AC161/74ACT161 and MC74AC163/74ACT163 are high–speed synchronous modulo–16 binary counters. They are synchronously presettable for application in programmable dividers

948F

Abstract: ACT157 MC74AC157 MC74AC157D MC74AC157DR2 MC74AC157N MC74ACT157 MC74ACT157D MC74ACT157N
Contextual Info: MC74AC157, MC74ACT157 Quad 2-Input Multiplexer The MC74AC157/74ACT157 is a high–speed quad 2–input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true noninverted form.

74AC4040

Abstract: 948F MC74AC4040 MC74AC4040D MC74AC4040DR2 MC74AC4040DT MC74AC4040DTR2 MC74AC4040M MC74AC4040N ac4040
Contextual Info: MC74AC4040 12-Stage Binary Ripple Counter The MC74AC4040 consists of 12 master-slave flip-flops. The output of each flip-flop feeds the next and the frequency at each output is half that of the preceding one. The state of the counter advances on the negative-going edge of the Clock input. Reset is asynchronous and

948F

Abstract: MC74AC139 MC74AC139D MC74AC139DR2 MC74AC139N MC74ACT139 MC74ACT139D MC74ACT139N
Contextual Info: MC74AC139, MC74ACT139 Dual 1-of-4 Decoder/Demultiplexer The MC74AC139/74ACT139 is a high–speed, dual 1–of–4 decoder/demultiplexer . The device has two independent decoders, each accepting two inputs and providing four mutually–exclusive active–LOW outputs. Each decoder has an active–LOW Enable

948F

Abstract: MC74AC139 MC74AC139D MC74AC139DR2 MC74AC139N MC74ACT139 MC74ACT139D MC74ACT139N
Contextual Info: MC74AC139, MC74ACT139 Dual 1−of−4 Decoder/Demultiplexer The MC74AC139/74ACT139 is a high−speed, dual 1−of−4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually−exclusive active−LOW outputs. Each decoder has an active−LOW Enable input

948F

Abstract: ACT257 MC74AC257 MC74AC257D MC74AC257DR2 MC74AC257N MC74ACT257 MC74ACT257D MC74ACT257N
Contextual Info: MC74AC257, MC74ACT257 Quad 2−Input Multiplexer with 3−State Outputs The MC74AC257/74ACT257 is a quad 2−input multiplexer with 3−state outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present the

ALS Logic Family Specifications

Abstract: 74xx00 NAND 74ACXX
Contextual Info: MC74AC00, MC74ACT00 Quad 2-Input NAND Gate • Outputs Source/Sink 24 mA • ′ACT00 Has TTL Compatible Inputs VCC 14 http://onsemi.com 13 12 11 10 9 8 PDIP–14 N SUFFIX CASE 646 14 1 1 2 3 4 5 6 7 SO–14 D SUFFIX CASE 751A 14 GND 1 Figure 1. Pinout: 14–Lead Packages Conductors

MC74ACT138

Abstract: 948F MC74AC138 MC74AC138D MC74AC138DR2 MC74AC138N MC74ACT138D MC74ACT138N
Contextual Info: MC74AC138, MC74ACT138 1-of-8 Decoder/Demultiplexer The MC74AC138/74ACT138 is a high–speed 1–of–8 decoder/demultiplexer . This device is ideally suited for high–speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1–of–24