CAN BUS DECODER Search Results

moa11

Abstract: TEST47 TI43 MIL-STD-1760B
Contextual Info: 0Q Q BUS-65153 ILC DATA DEVICE CORPORATION«_ _ MIL-STD-1553B, NOTICE 2 & MIL-STD-1760B SMALL TERMINAL INTERFACE CIRCUIT “STIC” FEATURES DESCRIPTION The BUS-65153 can be easily inter­ faced to most CPU’s. In addition, the BUS-65153 can interface directly to min­

Contextual Info: Isolated CAN Transceiver with Integrated High Voltage, Bus-Side, Linear Regulator ADM3052 Data Sheet FEATURES GENERAL DESCRIPTION 5 kV rms isolated CAN transceiver Integrated V+ linear regulator Bus side powered by V+ and V− 11 V to 25 V operation on V+

Am2912 Bus Transceiver

Abstract: AM2912DC AM2912DC-B AM2912DM AM2912DM-B AM2912FM AM2912FM-B AM2912PC Am2912
Contextual Info: Am2912 Quad Bus Transceiver Distinctive Characteristics • • • • Input to bus is inverting Quad high-speed open collector bus transceiver Driver outputs can sink 100mA at 0.8V maximum Bus compatible with Am2905, Am2906, Am2907 • Advanced Schottky processing

AM26S10

Contextual Info: Am26S10/Am26S11 Am26SlO/Am26S11 Quad Bus Transceivers DISTINCTIVE CHARACTERISTICS Input to bus is inverting on Am26S10 Input to bus is non-inverting on Am26S11 Quad high-speed open collector bus transceivers Driver outputs can sink 100mA at 0.8V maximum •

B0283

Contextual Info: Am26S10/Am26Sl1 Quad Bus Transceivers DISTINCTIVE CHARACTERISTICS • • • • Input to bus is inverting on Am26S10 Input to bus is non-inverting on Am26S11 Quad high-speed open collector bus transceivers Driver outputs can sink 100mA at 0.8V maximum Bus compatible with Am2905, Am2906, Am2907

Am2912

Contextual Info: Am 2912 Am2912 Quad Bus Transceiver DISTINCTIVE CHARACTERISTICS • Input to bus ¡s inverting • Quad high-speed open collector bus transceiver • Driver outputs can sink 100mA at 0.8V maximum • Bus compatible with Am2905, Am2906, Am2907 • Advanced Schottky processing

ADM3052

Abstract: 100nf Capacitor 0201 ADM3052BRWZ ADM3052BRWZ-REEL7 Current-to-ADM3052
Contextual Info: Preliminary Technical Data Isolated CAN Transceiver with Integrated High Voltage, Bus-Side, Linear Regulator ADM3052 FEATURES Isolated CAN transceiver Integrated V+ linear regulator Bus side powered by V+ and V− 11 V to 25 V operation on V+ 5 V or 3.3 V operation on VDD1

AM26S11 equivalent

Abstract: AM2907 A0LA 1N916 AM26S10 26S12
Contextual Info: Am26S10/Am26S11 Am26S10/Am26S11 Quad Bus Transceivers DISTINCTIVE CHARACTERISTICS • • • • Input to bus is inverting on Am 26S10 Input to bus is non-inverting on Am 26S11 Quad high-speed open collector bus transceivers Driver outputs can sink 100mA at 0.6V maximum

Am26SI

Abstract: CONNECTOR 5 PIN Round PLT 1N916
Contextual Info: Am26S10/Am26S11 Am26S10/Am26S11 Quad Bus Transceivers DISTINCTIVE CHARACTERISTICS • • • • Input to bus is inverting on Am 26S10 Input to bus is non-inverting on Am 26S11 Quad high-speed open collector bus transceivers Driver outputs can sink 100mA at 0.6V maximum

Contextual Info: Am2912 Quad Bus Transceiver DISTINCTIVE CHARACTERISTICS • • • Bus compatible with Am2905, Am2906, Am2907 Advanced Schottky processing PNP inputs to reduce input loading Input to bus is inverting Quad high-speed open collector bus transceiver Driver outputs can sink 100mA at 0.8V maximum

H 9032

Abstract: SA3000
Contextual Info: EISA 9032 T% APRIL 1993 EISA Bus Master Interface Chip Intel 82596 Mode Patent Pending_ Features_ General Description_ * EISA Bus Master Interface Chip containing all The EISA 9032 is an EISA bus master chip which can be

Contextual Info: Isolated CAN Transceiver with Integrated High Voltage, Bus-Side, Linear Regulator ADM3052 FEATURES GENERAL DESCRIPTION 5 kV rms isolated CAN transceiver Integrated V+ linear regulator Bus side powered by V+ and V− 11 V to 25 V operation on V+ 5 V or 3.3 V operation on VDD1

ADM3052

Abstract: ADM3052BRWZ ADM3052BRWZ-REEL7 MS-013-AA Current-to-ADM3052 ISOLATED CAN TRANSCEIVER
Contextual Info: Isolated CAN Transceiver with Integrated High Voltage, Bus-Side, Linear Regulator ADM3052 FEATURES GENERAL DESCRIPTION 5 kV rms isolated CAN transceiver Integrated V+ linear regulator Bus side powered by V+ and V− 11 V to 25 V operation on V+ 5 V or 3.3 V operation on VDD1

OJP 201

Abstract: T45 12H
Contextual Info: EISA 9032 T•CHNOLOBV^ EISA Bus Master Interface Chip Intel 82596 Mode APRIL 1993 Patent Pending_ Features_ General Description_ • EISA Bus Master Interface Chip containing all The EISA 9032 is an EISA bus master chip which can be

BUS-65163

Abstract: BUS-25679 BUS-25679 DDC BUS-65153 16kx8 ram Beta Transformer Technology 5962-9216201 MIL-STD-1553B connector digram of complete transmitter BUS66
Contextual Info: BUS-65153 MIL-STD-1553B, NOTICE 2 AND MIL-STD-1760B SMALL TERMINAL INTERFACE CIRCUIT “STIC” FEATURES DESCRIPTION BUS-65153 can interface directly to minimum complexity subsystems such as switches, D/A converters, etc. The BUS-65153 is a complete, dual

Contextual Info: 24 993 EISA 9032 r . c^TTSTS-rrr EISA Bus Master Interface Chip Intel 82596 Mode MARCH 1993 Patent Pending_ Features_ General Description_ • EISA Bus Master Interface Chip containing all The EISA 9032 is an EISA bus master chip which can be

XLN-589

Abstract: MIL-STD-1553 XLN-589 removal 1553B transformer coupling mil-std1553
Contextual Info: 8.0 SERIAL DATA BUS INTERFACE The SµMMIT RTE Manchester encoder/decoder interfaces directly to the MIL-STD-1553 bus via transformers, using CHA-CHA and CHB-CHB. The designer can connect the SµMMIT RTE to the data bus via a short-stub direct-coupling connection or a long-stub (transformer-coupling) connection.

Contextual Info: QBQ BUS-65112 AND BUS-651170 IL.C DATA D EV ICE CORPORATION'S_ MIL-STD-1553 DUAL REDUNDANT REMOTE TERMINAL HYBRID FEATURES • Small Size and Low Power \ • Complete RTU Protocol • Supports 13 Mode Codes: Any Combinations Can be Illegalized BUS-65117 Flat Pack

ZO 103

Abstract: transformer coupling mil-std1553 55ohms 1553B MIL-STD-1553 bus a MIL-STD-1553-B XLN-589
Contextual Info: 10.0 SERIAL DATA BUS INTERFACE The S MMIT LX/DX & S MMIT XT Manchester encoder/ decoder interfaces directly to the MIL-STD-1553 bus via transformers, using CHA-CHA and CHB-CHB. The designer can connect the S MMIT LX/DX & S MMIT XT to the data bus via a short-stub direct-coupling connection or a long-stub

Contextual Info: Component Input Video Swich with I2C Bus MM1519 MITSUMI Component Input Video Swich with I2C Bus Monolithic IC MM1519 February 21, 2000 Outline This IC is a color difference input video switch IC with I2C bus control developed for high-resolution TVs. It can support PIP TVs, monitor output, decoder output, etc. as it provides 3 outputs.

b24 b03

Abstract: controled Data sheet tuner mitsumi tsu 7 MM1519 mitsumi tuner swich
Contextual Info: MITSUMI Component Input Video Swich with I2C Bus MM1519 Component Input Video Swich with I2C Bus Monolithic IC MM1519 February 21, 2000 Outline This IC is a color difference input video switch IC with I2C bus control developed for high-resolution TVs. It can support PIP TVs, monitor output, decoder output, etc. as it provides 3 outputs.

89lpc932

Abstract: AN10148 JESD22-A114 JESD22-A115 P82B96 P82B96DP P82B96PN P82B96TD PCA82C250
Contextual Info: P82B96 Dual bidirectional bus buffer Rev. 08 — 10 November 2009 Product data sheet 1. General description The P82B96 is a bipolar IC that creates a non-latching, bidirectional, logic interface between the normal I2C-bus and a range of other bus configurations. It can interface

p82b961

Abstract: AN10148 16PLUS P82B96T SC50 89lpc932 5.1 channel master volume circuit with remote control
Contextual Info: P82B96 Dual bidirectional bus buffer Rev. 05 — 27 January 2006 Product data sheet 1. General description The P82B96 is a bipolar IC that creates a non-latching, bidirectional, logic interface between the normal I2C-bus and a range of other bus configurations. It can interface

89lpc932

Abstract: P82B96TD P82B96 equivalent P82B96 P82B96DP P82B96PN PCA82C250 AN10148 JESD22-A114 JESD22-A115
Contextual Info: P82B96 Dual bidirectional bus buffer Rev. 07 — 12 February 2009 Product data sheet 1. General description The P82B96 is a bipolar IC that creates a non-latching, bidirectional, logic interface between the normal I2C-bus and a range of other bus configurations. It can interface