C5T MARKING Search Results

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD DTC143T NPN SILICON TRANSISTOR NPN DIGITAL TRANSISTOR BUILT- IN BIAS RESISTORS 3 FEATURES 1 2 EQUIVALENT CIRCUIT B SOT-23 3 * Built-in bias resistors that implies easy ON/OFF applications. * The bias resistors are thin-film resistors with complete isolation to

MARKING C5T

Abstract: DTC143TL c5t marking DTC143T DTC143T-AE3-R DTC143T-AL3-R DTC143T-AN3-R c5t sot23
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD DTC143T NPN SILICON TRANSISTOR NPN DIGITAL TRANSISTOR BUILT- IN BIAS RESISTORS 3 FEATURES 1 2 EQUIVALENT CIRCUIT B SOT-23 3 * Built-in bias resistors that implies easy ON/OFF applications. * The bias resistors are thin-film resistors with complete isolation to

24C32F

Abstract: C32F marking C5t FOOTPRINT MO-229 2X3 SOLDERING c5t marking marking code C5T CAT24C32YE-G CAT24C32LE-G CAT24C32YI-GT3 CAT24C32WE-GT3
Contextual Info: CAT24C32 32-Kb I2C CMOS Serial EEPROM Description The CAT24C32 is a 32−Kb CMOS Serial EEPROM devices, internally organized as 4096 words of 8 bits each. It features a 32−byte page write buffer and supports the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.

FOOTPRINT MO-229 2X3 SOLDERING

Abstract: C32F
Contextual Info: CAT24C32 32-Kb I2C CMOS Serial EEPROM Description The CAT24C32 is a 32−Kb CMOS Serial EEPROM devices, internally organized as 4096 words of 8 bits each. It features a 32−byte page write buffer and supports the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.

marking C5t

Contextual Info: F MIL-M-38510/230A I ! I l]IlAL 1 h ILA I I'UN-r REQUIREMENTS I R E M O V E D _ L MIL-M-38510/230 USAF 20 J u ne 1979 MI L I T A R Y S P E C I F I C A T I O N M I C R O C I R C U I T , DI GI TA L, BIPOLAR 256 BIT RA N D O M A C C E S S M E M O R Y (RAM)

Contextual Info: CAT24C32 32-Kb I2C CMOS Serial EEPROM Description The CAT24C32 is a 32−Kb CMOS Serial EEPROM devices, internally organized as 4096 words of 8 bits each. It features a 32−byte page write buffer and supports the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.

Contextual Info: CAT24C32 32-Kb I2C CMOS Serial EEPROM Description The CAT24C32 is a 32−Kb CMOS Serial EEPROM devices, internally organized as 4096 words of 8 bits each. It features a 32−byte page write buffer and supports the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.

FOOTPRINT MO-229 2X3 SOLDERING

Abstract: marking code C5T 24C32F marking code C32f C32F CAT24C32 marking c5a CAT24C32WE-GT3 CAT24C32C5ATR c5t marking
Contextual Info: CAT24C32 32-Kb I2C CMOS Serial EEPROM Description The CAT24C32 is a 32−Kb CMOS Serial EEPROM devices, internally organized as 4096 words of 8 bits each. It features a 32−byte page write buffer and supports the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.

XICOR DATE CODE

Abstract: AN44 Xicor MARKING C5T
Contextual Info: A p p l ic a t io n N o te s A V A I L A B L E AN42 • AN44—50 • AN52 • AN53 • AN71 • AN73 XSftkftial Voltage ±5V, 32 Taps, Log Taper w X9314 E2POT Nonvolatile Digital Potentiometer FEATURES DESCRIPTION • Low Power CMOS —VCc = 3V to 5.5V

Contextual Info: CAT24C32 32-Kb I2C CMOS Serial EEPROM Description The CAT24C32 is a 32−Kb CMOS Serial EEPROM devices, internally organized as 4096 words of 8 bits each. It features a 32−byte page write buffer and supports the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.

jedec MS-026 ABA footprint

Contextual Info: CAT24C32 32-Kb I2C CMOS Serial EEPROM Description The CAT24C32 is a 32−Kb CMOS Serial EEPROM devices, internally organized as 4096 words of 8 bits each. It features a 32−byte page write buffer and supports the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.

1N 473A

Abstract: A1258 MO-105 NASA Group 5962-K646-3 M3167
Contextual Info: M I L - M - 3 85 10 /4 73 A N AS A IREQUIR EM EN TS I REMOVED 30 September 1983 S T T P m n m r c -MIL-M-38510/473(NASA) 17 No ve m b e r 1980 I MILITARY SPECIFICATION MICROC IR CU IT S, DIGITAL, CMOS, M O N O L I T H I C 8 -BIT INPU T/ OU TP UT PORT

a12w

Abstract: 74LS373 PIN CONFIGURATION AND SPECIFICATIONS
Contextual Info: M IC R O N MT56C0818 DUAL 4 K x 1 8 SRAM, SINGLE 8K x 18 SRAM CACHE DATA SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 18 SRAM s with common ad dresses and data; also configurable as a single 8K x 18 SRAM • Built-in input ad dress latches

Contextual Info: MT56C3818 8K x 18, DUAL 4K x 18 CACHE DATA SRAM M IC R O N CACHE DATA SRAM SINGLE 8Kx18 SRAM, DUAL 4KX18SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 18 SRAMs with common addresses and data; also configurable as a single 8K x 18 SRAM

Contextual Info: CAT24C32 32-Kb I2C CMOS Serial EEPROM Description The CAT24C32 is a 32−Kb CMOS Serial EEPROM devices, internally organized as 4096 words of 8 bits each. It features a 32−byte page write buffer and supports the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.

FOOTPRINT MO-229 2X3 SOLDERING

Abstract: 24C32F 948AL C32F CAT24C32 517AX-01 marking code C5T 24c32 wp marking c5t YM 254
Contextual Info: CAT24C32 32-Kb I2C CMOS Serial EEPROM Description The CAT24C32 is a 32−Kb CMOS Serial EEPROM devices, internally organized as 4096 words of 8 bits each. It features a 32−byte page write buffer and supports the Standard 100 kHz , Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.

8251 microprocessor block diagram

Abstract: microprocessors interface 8086 to 8251 features of 8251 microprocessor Intel 8251 operation of 8251 microprocessor microprocessors interface 8086 with 8251 intel 8251 uart intel 8251 USART control word format intel 8251 USART UART 8251
Contextual Info: 8251A PRO G RA M M A B LE COMMUNICATION INTERFACE Synchronous and Asynchronous Operation Synchronous 5 -8 Bit Characters; Internal or External Character Synchronization; Automatic Sync Insertion Asynchronous 5 -8 Bit Characters; Clock Rate—1,16 o r 64 Times Baud

7 bit shift register

Abstract: KS-8205 Samsung UART KS
Contextual Info: KS82C450/C50A ASYNCHRONOUS COMMUNICATIONS ELEMENT DESCRIPTION FEATURES • Single Chip UART/BRG • DC to 10 • Crystal or External Clock Input • On Chip Baud Rate Generator 1 to 65535 Divisor Generates 16x Clock • Prioritized Interrupt Mode • Fully TTL/CMOS Compatible

5962-9752201QZC

Abstract: qml-38535 XC4005E-4PG156B 4005E XC4005E PHYSICAL
Contextual Info: REVISIONS LTR DATE YR-MO-DA DESCRIPTION APPROVED REV SHEET 35 36 37 38 39 40 41 42 43 15 16 17 18 19 20 21 22 23 REV SHEET REV STATUS OF SHEETS PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE

Contextual Info: STANDARD MICROSYSTEMS CORPORATION, 80 Arfcay Drive, Hauppauge, n y 11788 516 435-6000 Fax (516) 251-6004 |NT % DIVISION FDC37C661 FDC37C662 2.88MB Super I/O Floppy Disk Controllers FEATURES 2.88M B Super I/O Floppy Disk Controller • - Licensed C M O S 765B Floppy Disk

Contextual Info: M ic r o c h ip PIC16C6X 8-Bit CMOS Microcontrollers Devices included in this data sheet: PIC16C61 • PIC16C64A PIC16C62 • PIC16CR64 PIC16C62A • PIC16C65 PIC16CR62 • PIC16C65A PIC16C63 • PIC16CR65 PIC16CR63 • PIC16C66 PIC16C64 • PIC16C67 • Low-power, high-speed CMOS EPROM/ROM

31DF DIODE

Abstract: S3 TRIO 3D ON4801 7.2 mghz BT475 bt475 ramdac S3 TRIO 3d on board marking 3L2 diode S4d2 S3 TRIO jumper
Contextual Info: •■ ■■■■■■ ■■ v ■■ ■■ . n ••■ ■ ■ ■■ ■■■ A ■■ ■■ ■■ _ ' i r 3 82C480 Graphics Accelerator ■ Accelerates Windows, AutoCAD, and Presen­ tation Manager without special drivers ■ Hardware Graphics Functions:

Contextual Info: 1.0 I n t r o d u c t io n The monolithic SUMMIT provides the system designer with an intelligent solution to MIL-STD-1553 multiplexed serial data bus design problems. Hie SUMMIT is a single-chip device that implements all three of the defined MIL-STD-1553 functions Remote Terminal, Bus Controller, and Monitor. Operating

EN14003

Abstract: ten pao transformer TN2E-5V
Contextual Info: Data Sheet January 1997 microelectronics group Lucent Technologies Bell Labs Innovations T7901 ISA Single Wide Area Connection ISA-SWAC Device Features • One wide area connection port that can be config­ ured as a basic rate ISDN TE or NT or as a syn­