C16I Search Results

double balanced mixer balun

Abstract: bxc17 c221 TRANSISTOR gilbert cell differential pair high frequency mixer C12A C12B PMB2207 gilbert mixer DOUBLE BALANCED MODULATOR
Contextual Info: SIEM EN S Mixer DC - 2.5GHz and Vector Modulator 80 - 800MHz PMB 2207 Target Spezifikation Bipolar IC General Overview Features Vignette • Direct quadrature modulator with separate additional double balanced active mixer • Direct quadrature modulation

MOS57M

Abstract: ECL100K 5 pin voltage comparator IC - LP top mark
Contextual Info: NEL NS GM E021A Preliminary Feb. 29, 2000 MOS57M 10 Gb/s PLLType 16:1 MUX Module MOS57M is a 16:1 multiplexer module which was designed for use in the transmitter of optical systems. It combines 16 parallel data input signals operating at 622 Mb/s into a 9.95 Gb/s serial output signal and generates two clock output signals at 9.95 GHz. This

MH89760

Abstract: MT8940 MT8941B MT8941BP1 MT8941BPR1 MT8976
Contextual Info: MT8941B Advanced T1/CEPT Digital Trunk PLL Data Sheet Features June 2008 • Provides T1 clock at 1.544 MHz locked to an 8 kHz reference clock frame pulse • Provides CEPT clock at 2.048 MHz and ST-BUS clock and timing signals locked to an internal or external 8 kHz reference clock

NLG4304A

Abstract: NLG4304A-9 NLG4304A-10 E075B NTT Electronics VREF02
Contextual Info: NS GD E075B 23 Feb. 2000 NEL PRELIMINARY NLG4304A-9.96G NLG4304A-10.7G 16 : 1 MUX T h e N L G 4304A is an ultra -fast 16:1 multiplexer. NLG.4304A~9.96G com bines 16 parallel input signals o p eratin g at up to 6 22.5 M b / s into a single serial ou tp u t signal as fast as 9.96 G b / s M IN . .

of ic MT8870

Abstract: 1117d
Contextual Info: MH89770 MITEL* T1/ESF Framer & Interface Preliminary Information Features _ ISSUE 2_ March 1995 • Complete interface to a bidirectional T1 link • D3/D4 or ESF framing and SLC-96 compatible • Two frame elastic buffer with jitter tolerance

Vref-02

Abstract: ITT Semiconductors
Contextual Info: NS GD E122 NEL 16 July. 2001 PRELIMINARY 0.  12.5 Gb/s 16㧦1 MUX The NLG4307 is an ultra-fast 16:1 multiplexer. NLG4307 combines 16 parallel input signals operating at up to 781.25Mb/s into a single serial output signal as fast as 12.5 Gb/s䋨MIN.䋩.

LD113

Contextual Info: Advance Data Sheet October 1998 microelectronics group Lucent Technologies Bell Labs Innovations Ambassador T8100A, T8102, and T8105 H.100/H.110 Interfaces and Time-Slot Interchangers 1 Product Overview • Two independently programmable groups of up to

SI 122 D

Abstract: AS12E
Contextual Info: M I T E L SEMICONDUCTOR 15E D I b54T37Q OOOM'iflB 2 I MITEL* MT8940 T1/CEPT Digital Trunk PLL ISO-CMOS ST-BUS FAM ILY 91 61-002-03S-N A ISSU E 3 Features Provides T1 clock a t 1.544 M Hz locked to input fram e pulse. So u rces C EP T 30 + 2 D ig ital T ru n k/S T -B U S

PT7A9080

Abstract: p1908 1S1823
Contextual Info: I III III III III III III III III III III III III III III III II III III III III III III III III III III III III III III III III III III III III III III III III III III III III II Serial and Parallel Conversion Circuits SPC Product Features Product Description:

TVP1510

Contextual Info: ISO-CMOS ST-BUS FAMILY MITEL* Features MT8940 T1/CEPT Digital Trunk PLL _ ISSUE 7_ July 1993 Ordering Information • • • • • • Provides T1 clock at 1.544 MHz locked to input frame pulse Sources CEPT 30+2 Digital Trunk/ST-BUS

E1210

Abstract: JT-G704 JT-G703 JT-G706 MT9072 MT9072AB MT9072AV PUB43801 PCM24 Y230
Contextual Info: MT9072 Octal T1/E1/J1 Framer Data Sheet Features • • • • • • • October 2004 Eight fully independent, T1/E1/J1 framers 3.3 V supply with 5 V tolerant inputs Selectable 2.048 Mbit/s or 8.192 Mbit/s serial buses for both data and signaling Framing Modes:

MH89760

Abstract: MT8940 MT8941B MT8941BE MT8941BP MT8976
Contextual Info: CMOS ST-BUS FAMILY MT8941B Advanced T1/CEPT Digital Trunk PLL DS5186 Features ISSUE 1 June 1999 Ordering Information • • • Provides T1 clock at 1.544 MHz locked to an 8 kHz reference clock frame pulse Provides CEPT clock at 2.048 MHz and ST-BUS

Contextual Info: M MT8940 T1 /CEPT Digital Trunk PLL ISO-CMOS ST-BUS FAMILY I T E L ISSUE 7 9161-002-035-NA July 1993 Features • Provides T1 clock at 1.544 MHz locked to input fram e pulse O rdering Inform ation MT8940AC MT8940AE • Sources CEPT 30 + 2 D igital Trunk/ST-BUS

Contextual Info: CMOS M IT E L MT9085 PAC - Parallel Access Circuit Features IS S U E 3 • Configurable for parallel-to-serial or serial-to-parallel conversion of 1024 channels • Interfaces to Mitel’s MT9080 Switch Matrix Module SMX . Generates all framing signals required in 1K or 2K switching applications

mcb circuit diagram

Abstract: MSAN-135 MT9080 MT9085 ts992
Contextual Info: Application Note MSAN-135 Design of Large Digital Switching Matrices using the SMX/PAC ISSUE 3 CONTENTS 1.0 Introduction 2.0 Digital Switching Basics 3.0 Design of 1024 Channel Switch 3.1 Parallel Timeslot Switch 3.1.1 Circuit Description 3.1.2 Throughput Delay Considerations

Contextual Info: MT9072 Octal T1/E1/J1 Framer Advance Information DS5063 Features • • Eight fully independent, T1/E1/J1 framers 3.3V supply with 5V tolerant inputs • Selectable 2.048 Mbit/s or 8.192 Mbit/s serial buses for both data and signaling • • Framing Modes:

Contextual Info: MT9072 Octal T1/E1/J1 Framer Advance Information Features • • • • • • • DS5063 Eight fully independent, T1/E1/J1 framers 3.3V supply with 5V tolerant inputs Selectable 2.048 Mbit/s or 8.192 Mbit/s serial buses for both data and signaling Framing Modes:

S-8975

Abstract: C81l S8940 S8975
Contextual Info: GOULD T1/CEPT Digital Trunk PLL Electronics Prelim inary Data Sheet F eatures • Provides T1 clock at 1.544 MHz locked to input fram e pulse • Sources CEPT 30 + 2 Digital Trunk/ST-BUS clock and timing signals locked to internal or external 8 kHz signal

HFA1109AMP

Abstract: 70216 C100 HFA1109 HFA1149 L100 L200 MM1149 R200 R850
Contextual Info: HFA1149 SPICE Macromodel CFA Application Note March 1997 MM1149 Introduction The HFA1149 is a high speed, low power current feedback amplifier with output Enable/Disable capability. The macromodel for the HFA1149 is PSPICE (registered trademark of MicroSim Corp.) compatible, and may be compatible with

ST-0121

Abstract: ssc-32 cross D6t IF241 16.384MHZ sfe 5,5 ma sfe 5,5 mb MT90826 MT90826AG MT90826AL
Contextual Info: MT90826 H ITIA!fI M I T E L Quad Digital Switch Advanced Information S E M IC O N D U C T O R Features DS5197 • 4,096 x 4,096 channel non-blocking switching at 8.192 or 16.384 Mb/s • Per-channel variable or constant throughput delay • Accept ST-BUS stream s o f 2.048Mb/s,

IF33

Abstract: of161 MT90826 MT90826AG MT90826AL MT90826AL1 MT90826AV STI10 STo26
Contextual Info: MT90826 Quad Digital Switch Data Sheet Features • January 2006 4,096 x 4,096 channel non-blocking switching at 8.192 or 16.384 Mbps Ordering Information MT90826AL MT90826AG MT90826AV MT90826AL1 MT90826AG2 160 Pin MQFP Trays 160 Ball PBGA Trays 144 Ball LBGA

spice model L200

Abstract: MM1149 ry8i C100 HFA1109 HFA1149 L100 L200 R850 RR45
Contextual Info: Harris Semiconductor No. MM1149 Harris Linear March 1997 HFA1149 SPICE Macromodel CFA Author: Rob Adams Introduction The model topology consists of three main functional sections: a buffer between the two input pins, an output section between the inverting input pin and the output pin, and an

sfe 6,5 mb

Abstract: OF81 1A1-1A10 TX11-RX11 sfe 55 mb
Contextual Info: 3.3 VOLT TIME SLOT INTERCHANGE DIGITAL SWITCH 8,192 x 8,192 ADVANCE INFORMATION IDT72V71650 FEATURES: DESCRIPTION: • • The IDT72V71650 has a non-blocking switch capacity of 1,024 x 1,024 channels at 2.048 Mb/s, 2,048 x 2,048 channels at 4.096 Mb/s, and 4,096 x

mcb internal circuit diagram

Abstract: mcb circuit diagram MT9080 MT9080B MT9085 MT9085B MT9085BP
Contextual Info: MT9085B PAC - Parallel Access Circuit Features DS5141 ISSUE 4 March 1999 Ordering Information • • • • • • Configurable for parallel-to-serial or serial-to-parallel conversion of 1024 channels Supports serial data rates of 2.048 Mbit/s or 4.096 Mbit/s