BRANCH CONDITIONAL UNCONDITIONAL INSTRUCTION Search Results

programmable pipeline microcode memory

Abstract: Am2942 branch conditional unconditional instruction cmux CCCN 10MHz
Contextual Info: ZU 6ZU 1V Am29112 A High-Performance 8-Bit Slice Microprogram Sequencer DISTINCTIVE CHARACTERISTICS Expandable 8-bit Slice, cascadable up to 16-bits Deep stack A 33 deep on-chip stack is used for subroutine link­ age, interrupt handling and loop control.

ADSP-21990

Abstract: ADSP-21991 ADSP-21992 PF10
Contextual Info: ADSP-219x DSP Instruction Set Reference Revision 2.0, December 2005 Part Number 82-000390-07 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written

80960MC

Abstract: branch conditional unconditional instruction
Contextual Info: Instruction-Set Summary Q CHAPTER 6 INSTRUCTION-SET SUMMARY This chapter provides an overview of the instruction set for the 80960MC processor. Included is a discussion of the instruction format and a summary of the instruction groups and the instructions in each group.

vertex m1

Abstract: algorithm builder R20 marking ELECTRONIC BALLAST MICROCONTROLLER AVR MARKING CODE branch conditional unconditional instruction
Contextual Info: A T M E L A P P L I C A T I O N S J O U R N A L Algorithm Builder for AVR by Gennady Gromov, Tula Telecom The most commonly used programming tools for AVR Microcontrollers are a C language compiler or assembler. Each approach has relative strengths and limitations. Assembly language programs typically produce smaller code size but

intel instruction set

Abstract: 80960CA 80960SA reference opword branch conditional unconditional instruction
Contextual Info: 1 Instruction Set Overview This chapter provides an overview of the i960 microprocessor family’s instruction set and i960 Jx processor-specific instruction set extensions. Also discussed are the assembly-language and instruction-encoding formats, various instruction groups and each group’s instructions.

bge 1,5

Abstract: intel instruction set
Contextual Info: Instruction Set Overview 5 This chapter provides an overview of the i960 microprocessor family’s instruction set and i960 RM/RN I/O processor-specific instruction set extensions. Also discussed are the assembly-language and instruction-encoding formats, various instruction groups and each group’s

SPRU217

Abstract: SPRA069 TMS320C80 Y-delta connection with timer on delay texas 4mb dram SPRA066 SPRU178
Contextual Info: TMS320C8x Register Allocator and Code Compactor Release 2.00 User’s Guide 1997 Digital Signal Processing Solutions Printed in U.S.A., February 1997 D418022–9741 revision * * SPRU217 TMS320C8x Register Allocator and Code Compactor User’s Guide Release 2.00

GOERTZEL ALGORITHM SOURCE CODE

Abstract: SPRA069 Position Estimation TMS320C80 SPRA066 SPRS023
Contextual Info: TMS320C8x Register Allocator and Code Compactor User’s Guide Release 2.00 Literature Number: SPRU217 Manufacturing Part Number: D418022–9741 revision * February 1997 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any

67110D

Abstract: bit-slice branch conditional unconditional instruction 7110D 4-bit slice 57110
Contextual Info: Microprogram Controller 57110/67110 Data Sheet '/ Features/Benefits Description • Address 512 Word Pages of Memory The 57110/67110 Microprogram Controller M P C is a member of the 57000/67000 Com puter Logic family of high-performance bipolar compatible Schottky T T L components. The device is

branch conditional unconditional instruction

Abstract: D7 29F
Contextual Info: 29F10 29F10 Connection Diagrams M icroprogram C ontroller - O The 29 >eed bipolar microprogram controller. It is intended for use in he sequence of execution of m icroinstructions stored in m ic rb p io fa m The 29F10 provides a 12-bit address

AM2910DC

Abstract: AM2910DC-B AM2910PC AM2910DM Am2910 AM2910DM-B AM2910/BQA AM2910DMB processor Am2901 AM2910FM
Contextual Info: Am2910 Microprogram Controller D IS T IN C T IV E C H A R A C TER IS TIC S G E N E R A L D E SC R IPTIO N • Twelve Bits Wide Address up to 4096 words of microcode with one chip. All internal elements are a full 12 bits wide. • Internal Loop Counter Pre-settable 12-bit down-counter for repeating instructions

922z

Abstract: processor Am2901 AM2910DMB AM2910DC
Contextual Info: Am2910 Microprogram Controller D IS T IN C T IV E C H A R A C TER IS TIC S G E N E R A L D E SC R IPTIO N • Twelve Bits Wide Address up to 4096 words of microcode with one chip. All internal elements are a full 12 bits wide. • Internal Loop Counter Pre-settable 12-bit down-counter for repeating instructions

lifo stack

Abstract: idm2901 idm2910
Contextual Info: IDM291OA 2900 Family/ Bipolar Microprocessor National Semiconductor PRELIMINARY IDM291 OA Microprogram Controller General Description Features and Benefits The IDM2910A Microprogram Controller is a 12-bit wide address controller packaged in a standard 40-pin dual-in-line package. The IDM2910A features

am29203 "evaluation board"

Abstract: 8080a intel microprocessor Architecture Diagram intel microprogram sequencer AM29101 processor am2900 processor Am2901 Xl2104 80286 architecture AMD 2903 bit slice DIP 16 DRAWING Advanced Micro Devices
Contextual Info: a ED2900A INTRODUCTION TO DESIGNING WITH THE Am2900 FAMILY OF MICROPROGRAMMABLE BIPOLAR DEVICES LECTURE VOLUME I ED2900A INTRODUCTION TO DESIGNING WITH THE Am2900 FAMILY OF MICROPROGRAMMING BIPOLAR DEVICES Volume I 3rd Edition January 1985 Advanced Micro Devices, Inc.

mnemonic

Abstract: branch conditional unconditional instruction
Contextual Info: 7 Instruction Summary The tables in this section summarize the common instructions implemented by the Alpha AXP architecture, the PALmode instructions required by all Alpha AXP implementations, and the architecturally reserved PALmode instructions implemented in the DECchip 21066 microprocessor. The instruction summaries

branch conditional unconditional instruction

Abstract: i960 MC instruction
Contextual Info: Instruction Set Summary 6 CHAPTER 6 INSTRUCTION SET SUMMARY This chapter provides an overview o f the instruction set for the i960 MC processor. Included is a discussion o f the instruction format and a summary of the instruction groups and the instructions in each group.

Motorola MPC556

Abstract: 0C00 1C00 MPC555 MPC556 Motorola 417 "Huffman coding" branch conditional unconditional instruction
Contextual Info: SECTION 4 BURST BUFFER The burst buffer module consists of the burst buffer controller BBC and the instruction memory protection unit (IMPU). The BBC delivers the RCPU instruction fetch accesses from the instruction bus onto the U-bus. It utilizes the full U-bus pipeline and a special page access attribute in order

DS3578-2

Abstract: MA2901 MA2910 26y10 DS3578
Contextual Info: MA2910 APRIL 1995 DS3578-2.5 MA2910 RADIATION HARD MICROPROGRAM CONTROLLER The industry standard MA2910 Microprogram Controller forms part of the MA2900 family of devices. Offering a building block approach to microcomputer and controller design, each device in the range is expandable

Motorola MPC556

Abstract: MPC556 Motorola 417 0C00 1C00 MPC555 0x80E0 branch conditional unconditional instruction
Contextual Info: SECTION 4 BURST BUFFER The burst buffer module consists of the burst buffer controller BBC and the instruction memory protection unit (IMPU). The BBC delivers the RCPU instruction fetch accesses from the instruction bus onto the U-bus. It utilizes the full U-bus pipeline and a special page access attribute in order

SH7702

Contextual Info: SH-3: SH7702/7708 Product Brief SH7700 Series 32-Bit RISC Microprocessors HITACHI PMH13T0001D1 Rev 0.1 09/12/96 Features • • • 45 MHz SH7702 , 60 MHz (SH7708) SuperH RISC engine (CPU) — 4 Gbytes of address space — Single-cycle execution of basic instructions

Contextual Info: Si GEC P I E S S E Y SE M I CO N D U CT O RS DS3578-2 4 MA2910 RADIATION HARD MICROPROGRAM CONTROLLER The industry standard MA2910 Microprogram Controller forms part of the MA2900 family of devices. Offering a building block approach to microcomputer and controller design, each device in the range is expandable

Contextual Info: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MA2910 APRIL 1995 DS3578-2.5 MA2910 RADIATION HARD MICROPROGRAM CONTROLLER The industry standard MA2910 Microprogram Controller forms part of the MA2900 family of devices.

Contextual Info: S i GEC PLESSEY S E M I C O N D U C T O R S D S 3578-2.5 MA2910 RADIATION HARD MICROPROGRAM CONTROLLER The industry standard MA2910 Microprogram Controller forms part of the MA2900 fam ily of devices. Offering a building block approach to microcomputer and

Contextual Info: VS29G10A VS29G10A 12-bit Microcontroller Features 0 Single ECL power supply: VTT = -2.0 ± 0.1 V • VREF input flexibility for tracking 10K/10KH ECL input signals • Supports clock rates up to 75 MHz • Compatible with ECL 100K signal levels • Functionally equivalent to Am2910A,