d3376
Abstract: 74AC11828
Contextual Info: 54AC 11828, 74AC11828 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS TI0156— D 3376, NOVEMBER 1909— REVISED MARCH 1990 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers S4AC11828 . . . JT PACKAGE 74AC11828 . . . DW OR NT PACKAGE TOP VIEW
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74ac1182810-bitti0156--500-ma+3300-mils4ac11828d3376
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qk 69 snd
Abstract: D2987
Contextual Info: 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER D2957, JULY 1989 - REVISED A P R IL 1993 DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin V c c and GND Pin Configurations Minimize High-Speed Switching Noise
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74ac11158d2957500-ma300-mil+2qk 69 sndd2987
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SRPS019
Abstract: pal16r8 programming algorithm ps019 TIBPAL16R8-20
Contextual Info: TIBPAL16L8-15C, TIBPAL16R4-15C, TIBPAL16R6-15C, TIBPAL16R8-15C TIBPAL16L8-20M, TIBPAL16R4-20M, TIBPAL16R6-20M, TIBPAL16R8-20M HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS019 - D3340, FEBR UARY 1984 - REVISED M ARCH 1992 TIBPAL16L8' C SUFFIX . . . J OR N PACKAGE
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tibpal16l8-15ctibpal16r4-15ctibpal16r6-15ctibpal16r8-15c+9tibpal16l8-20mtibpal16r4-20mtibpal16r6-20mtibpal16r8-20msrps019d3340pal16r8 programming algorithmps019tibpal16r8-20
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SN74ALVCH16260
Contextual Info: SN74ALVCH16260 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS SCES046-JULY 1995 Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds
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sn74alvch1626012-bit24-bitsces046-july+2mil-std-883cjesd-17
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LPD-D
Abstract: sk2 354 SN74ABT3613 D1D1240
Contextual Info: SN74ABT3613 64 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING S C B 51 28 C - JULY 1992 - RE V IS E D M ARCH 1994 Free-Running CLKA and CLKB Can Be Asynchronous or Coincident 64 x 36 FIFO Buffering Data From Port A to Port B Mailbox Bypass Registers In Each
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sn74abt3613scb5128clpd-dsk2 354+1d1d1240
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TLC271 equivalent
Abstract: Tlc2711 TLC271 HB F 2480 TIC27 TLC271C DT317
Contextual Info: TLC271, TLC271A, TLC271B LinCMOS PROGAMMABLE LOW-POWER OPERATIONAL AMPLIFIERS SI.OS090A - NOVEMBER 1987 - REVISED AUGUST 1994 D, JG, OR P PACKAGE CTOP VIEW Input Offset Voltage D r ift. . . Typically 0.1 |xV/Month, Including the First 30 Days Wide Range of Supply Voltages Over
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tlc271tlc271atlc271bos090a+7slqs090a-tlc271 equivalenttlc2711hb f 2480tic27tlc271cdt317
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T1BPAL16L8
Abstract: tibpal16l8 PAL16R48 PAL16L8A tibpal16r8 TIBPAL16L8-25C TIBPAL16L8-30M TIBPAL16R4-25C TIBPAL16R4-30M TIBPAL16R6-25C
Contextual Info: TIBPAL16L8-25C, TIBPAL16R4-25C, TIBPAL16R6-25C, TIBPAL16R8-25C TIBPAL16L8-30M, TIBPAL16R4-30M, TIBPAL16R6-30M, TIBPAL16R8-30M LOW-POWER HIGH-PERFORMANCE IMPACT PAL CIRCUITS SRPS020 - D3337. FEBRUARY 1984 - REVISED MARCH 1992
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tibpal16l8-25ctibpal16r4-25ctibpal16r6-25ctibpal16r8-25c+11tibpal16l8-30mtibpal16r4-30mtibpal16r6-30mtibpal16r8-30m8rps020d3337t1bpal16l8tibpal16l8pal16r48pal16l8atibpal16r8
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D3790
Contextual Info: b3E D TEXAS INSTR LOGIC • 6 ^ 1 7 2 3 DD^lbb? 164 B T I I 3 SN54ABT2953, SN74ABT2953 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS _ D3790, FEBRUARY 1991-REVISED OCTOBER 1992 Space-Saving Package Option: Shrink Small-Outline Package (DB)
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sn54abt2953sn74abt2953d37901991-revised+1abt2953
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2v5 low skew buffer
Abstract: 10E1 20E2 SN74LVCH16540A
Contextual Info: SN74LVCH16540A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SC AS569A - MARCH 1996 - REVISED JUNE 1996 Member of the Texas Instruments Widebus Family DGG OR DL PACKAGE TOP VIEW EPIC ™ (Enhanced-Performance Implanted CMOS) Submicron Process , Typical V q l p (Output Ground Bounce)
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sn74lvch16540a16-bitscas569amil-std-883c+5jesd-1701dl5me2v5 low skew buffer10e120e2
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RS4S5
Contextual Info: SN751177, SN751178 DUAL DIFFERENTIAL DRIVERS AND RECEIVERS D3381, MARCH 1980 SN751177 N PA C K A G E TOP VIEW • Meets EIA Standards RS-422-A, RS485 • Meets CCITT Recommendations V.10, V.11.X.26, X.27 • Designed for Multipoint Bus Transmission on Long Bus Lines In Noisy Environments
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sn751177sn751178d3381rs-422-a+3rs485sn7s1177rs4s5
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CDC204-7
Abstract: CDC204 phase inverters circuit diagram
Contextual Info: CDC204, CDC204-7 HEX INVERTERS/CLOCK DRIVERS S C A S 098C - OCTO BER 1 9 8 9 - RE V IS E D MARCH 1994 DW OR N PACKAGE TOP VIEW * CDC204 Replaces 74AC11204 * CDC204-7 Replaces 74AC11204-7 * Low-Skew Propagation Delay Specifications for Clock-Driver Applications
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cdc204cdc204-7scas098c74ac11204+574ac11204-7500-ma300-milcdc204/204-7phase inverters circuit diagram
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TLC4502
Abstract: TLC4502A TLC4502ACDR TLC4502AIDR TLC4502CDR TLC4502IDR BU100
Contextual Info: TLC4502, TLC4502A, TLC4502Y Advanced LinEPIC SELF-CALIBRATING Self-Cal™ PRECISION DUAL OPERATIONAL AMPLIFIERS SLOS161 A - O C T O B E R 1996 - REVISED NOVEMBER 1996 • • • • • • • • • • • • Power On Calibration of Input Offset
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tlc4502tlc4502atlc4502yslos161+94040047/bjedecms-012box65501q5bfl4tlc4502acdrtlc4502aidrtlc4502cdrtlc4502idrbu100
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ic TL034
Contextual Info: TL034, TL034A ENHANCED JFET LOW-POWER LOW -OFFSET QUAD OPERATIONAL AMPLIFIERS D3153, JULY 1988 - REVISED FEBRUARY 1991 D , J , or N P A C K A G E • Maximum Offset Voltage . . . 1.5 mV T O P V IE W • High Slew Rate . . . 2.9 V/jis Typ 1 0 U T [ 1 • Low Input Bias Current . . . 2pATyp
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tl034tl034ad315326mwtyp+2box655303-dallasic tl034
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TL052
Abstract: op tl082 Instrumentation Amplifier circuit with tl082 TL052C
Contextual Info: TL052, TL052A ENHANCED JFET PRECISION DUAL OPERATIONAL AMPLIFIERS D3235, JUNE 1988- REVISED FEBRUARY 1991 • Maximum Offset Voltage . . . 800 |iV TL052A • High Slew Rate . . . 17.8 V/jis Typ at 25°C • Low Total Harmonic Distortion . . . 0.003% Typ at R|_ = 2 kfl
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tl052tl052ad3235lt1004+5lt1009lm385op tl082instrumentation amplifier circuit with tl082tl052c
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10E1
Abstract: 10E2 20E1 20E2 SN54ALVTH16827 SN74ALVTH16827
Contextual Info: SN54ALVTH16827, SN74ALVTH16827 2.5-V/3.3-V 20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCES076A - JULY 1 9 9 6 - REVISED JULY 1996 SN54ALVTH16827 . . . WD PACKAGE SN74ALVTH16827 . . . DGG, DGV, OR DL PACKAGE TOP VIEW 5-V I/O Compatible High-Drive Capability (-32 mA/64 mA)
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sn54alvth16827sn74alvth1682720-bitsces076a+7300-mil380-milfl1bl72310e110e220e120e2
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16B2
Abstract: SN74CBT16209
Contextual Info: SN74CBT16209 18-BIT BUS EXCHANGE SWITCH _ NOVEMBER 1992-REVISEPAPF1IL1993 * 5 -Q Switch Connection Between Two Ports D G G O R DL PACKAGE TOP VIEW * TTL-Com patlble Input and Output Levels SO 1A1 1A2 GND 2A1 2A2 * Packaged In Plastic 300-mil Shrink
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sn74cbt1620918-bit300-milflcjbl723+116b2
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SN74LVCH16244A
Contextual Info: SN74LVCH16244A 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS S C A S 3 1 3 B - NO VEM BER 1993 - REVISED AUG UST 1995 DGG OR DL PACKAGE CTOP VIEW • Member of the Texas Instruments Wldebus Family • EPIC™ Enhanced-Performance Implanted CMOS) Submicron Process
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sn74lvch16244a16-bitscas313b-mil-std-883c+2jesd-17athl723
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BOX655303
Abstract: SN74ACT7801
Contextual Info: SN74ACT7801 1024 x 18 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY D3489, A P R IL 1990 In dep end ent A syn ch ro nou s Inputs and O utputs Input Ready, O utput Ready, and H alf Full Flags 1024 W ords by 18 B its Each C ascadable in W ord W idth and/or W ord Depth
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sn74act7801d348950-pf2048-word+618-bitd18-d35d0-d171024-word36-bitbox655303
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TLE21421
Abstract: S-108 TLE2141 TLE2141A TLE2141ACD TLE2141ACP TLE2141AID TLE2141CD TLE2141CP TLE2141ID
Contextual Info: firn TLE2141, TLE2141A EXCALIBUR LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL AMPLIFIERS D36S2, NOVEMBER 1990 - REVISED FEBRUARY 1991 available features Low Noise: 10 Hz . . 1 kHz . . Low V|Q . . . 500 ilV Max at 25°C Single or Split Supply . . . 4 V to 44 V
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tle2141tle2141ad36s2000-pf+1120-matle2142islos062atle21421s-108tle2141acdtle2141acptle2141aidtle2141cdtle2141cptle2141id
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