BLOCK INTERLEAVER Search Results
BLOCK INTERLEAVER Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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TCK22921G |
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Load Switch IC, 1.1 to 5.5 V, 2.0 A, Reverse current blocking / Auto-discharge, WCSP6E | Datasheet | ||
TCK22946G |
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Load Switch IC, 1.1 to 5.5 V, 0.4 A, Reverse current blocking / Auto-discharge, WCSP6E | Datasheet | ||
TCK22910G |
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Load Switch IC, 1.1 to 5.5 V, 2.0 A, Reverse current blocking, WCSP6E | Datasheet | ||
TCK207AN |
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Load Switch IC, 0.75 to 3.6 V, 2.0 A, Reverse current blocking / Auto-discharge, DFN4A | Datasheet | ||
TCK111G |
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Load Switch IC, 1.1 to 5.5 V, 3.0 A, Inrush current reducing / Reverse current blocking, WCSP6C | Datasheet |
BLOCK INTERLEAVER Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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IESS-308 sCRAMBLER
Abstract: iess 308 IESS-308 IESS-308 code IESS-308 standard AHA4524 AHA4540 AHA4541 AHA4011 10T10
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AHA4011 IESS-308 AHA4012 AHA4013 AHA4501 AHA4540 AHA4541 IESS-308 sCRAMBLER iess 308 IESS-308 IESS-308 code IESS-308 standard AHA4524 AHA4540 AHA4541 AHA4011 10T10 | |
4x4 unsigned multiplier VERILOG coding
Abstract: vhdl code for lvds driver 32x32 multiplier verilog code MULT18X18 12v relay interface with cpld in vhdl verilog/verilog code for lvds driver 80C31 instruction set vhdl code for 18x18 unSIGNED MULTIPLIER vhdl pulse interval encoder book national semiconductor
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UG012 4x4 unsigned multiplier VERILOG coding vhdl code for lvds driver 32x32 multiplier verilog code MULT18X18 12v relay interface with cpld in vhdl verilog/verilog code for lvds driver 80C31 instruction set vhdl code for 18x18 unSIGNED MULTIPLIER vhdl pulse interval encoder book national semiconductor | |
CRC-16 ccitt
Abstract: Mobitex R14N Support 0x8408 MX909A Block Interleaver
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MX909A MX909A 0x800; 0x000; 0x200; CRC-16 ccitt Mobitex R14N Support 0x8408 Block Interleaver | |
Contextual Info: Dynamic Block Reed-Solomon Decoder User’s Guide December 2010 IPUG52_01.6 Table of Contents Chapter 1. Introduction . 4 Quick Facts . 4 |
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IPUG52 LFSC/M3GA25E-7F900C D-2009 12L-1 | |
Interleaver-De-interleaver
Abstract: interleaver design for block interleaver deinterleaver convolutional interleaver Convolutional LFX125B04F256C LFX125B-04F256C timing interleaver Convolutional Puncturing Pattern
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Contextual Info: 16-Bit, 310 MSPS, 3.3 V/1.8 V Dual Analog-to-Digital Converter ADC AD9652 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD3 AVDD SDIO SCLK CSB DRVDD SPI AD9652 OR+, OR– PROGRAMMING DATA VIN+A DDR DATA INTERLEAVER LVDS OUTPUT DRIVER ADC VIN–A VREF SENSE |
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16-Bit, AD9652 1-18-2011-A 144-Ball BC-144-6) AD9652BBCZ-310 AD9652BBCZRL7-310 AD9652-310EBZ | |
nsd 102Contextual Info: 16-Bit, 310 MSPS, 3.3 V/1.8 V Dual Analog-to-Digital Converter ADC AD9652 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD3 AVDD SDIO SCLK CSB DRVDD SPI AD9652 OR+, OR– PROGRAMMING DATA VIN+A DDR DATA INTERLEAVER LVDS OUTPUT DRIVER ADC VIN–A VREF SENSE |
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16-Bit, AD9652 1-18-2011-A 144-Ball BC-144-6) AD9652BBCZ-310 AD9652BBCZRL7-310 AD9652-310EBZ nsd 102 | |
RXLFIContextual Info: Operational Description July 2002 TFEC0410G 2.5/10 Gbits/s Optical Networking Interface with Strong/Weak FEC and Digital Wrapper 1 Document Organization This document is primarily intended for designers who require design implementation information and block |
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TFEC0410G 37--Section DS02-229SONT RXLFI | |
PJO 199
Abstract: DIODE 22B4 DIODE 709 1334 OTU1 MC68360 MPC860 STS-192 STS-48 TFEC0410G bip-1
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TFEC0410G DS02-232SONT PJO 199 DIODE 22B4 DIODE 709 1334 OTU1 MC68360 MPC860 STS-192 STS-48 bip-1 | |
ic lm358n
Abstract: Digital TV transmitter receivers block diagram OR51211 nc7z04m5 nc7z ic 5550 adc . Circuit Diagram using this IC nc7z0 LM358N DATA SHEET PC tv tuner module TILT rotATOR
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OR51210 OR51210 38Mhz OR51200, ic lm358n Digital TV transmitter receivers block diagram OR51211 nc7z04m5 nc7z ic 5550 adc . Circuit Diagram using this IC nc7z0 LM358N DATA SHEET PC tv tuner module TILT rotATOR | |
PB4540
Abstract: SNR estimation Forward Error Correction AHA ecc ADVANCED HARDWARE ARCHITECTURES encoder/decoder AHA4524 PS4501 8 TO 64 DECODER block diagram of 2 to 4 decoder
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AHA4524 AHA4524 AHA4501 PB4501EVM AHA4522 PB4522 AHA4540 PB4540 PS4501 PB4540 SNR estimation Forward Error Correction AHA ecc ADVANCED HARDWARE ARCHITECTURES encoder/decoder PS4501 8 TO 64 DECODER block diagram of 2 to 4 decoder | |
PB4540
Abstract: Turbo product code 3-8 decoder circuit diagram PB4540 transistor ADVANCED HARDWARE ARCHITECTURES PB4501EVM block diagram of 2 to 4 decoder ttl decoder Turbo Decoder TURBO Encoder/Decoder CODING
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AHA4522 AHA4522 AHA4501 PB4501EVSW AHA4501 PB4501EVM AHA4540 PB4540 PS4501 PB4540 Turbo product code 3-8 decoder circuit diagram PB4540 transistor ADVANCED HARDWARE ARCHITECTURES PB4501EVM block diagram of 2 to 4 decoder ttl decoder Turbo Decoder TURBO Encoder/Decoder CODING | |
FINISAR WSSContextual Info: EWP Edge Wavelength Processor WSS features LCoS Switching Technology Network Systems Ready DPRAM and Serial Interface Supports In-Service Firmware Upgrade ROADM or X-Connect Building Block Cascadable Add/Drop Functionality Low Degree Interconnect |
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ERF-050-05 0-01-L-RA-TR FINISAR WSS | |
AHA4524A-031
Abstract: AHA4524A-031PTI PB4524 Comtech Aha Corporation R793 code of encoder and decoder in rs(255,239) Turbo Decoder AHA4524 AHA4524A-031PTC interleaver
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AHA4524 AHA4524 AHA4524A-031 PB4524 AHA4524A-031PTI Comtech Aha Corporation R793 code of encoder and decoder in rs(255,239) Turbo Decoder AHA4524A-031PTC interleaver | |
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AHA4524A-031
Abstract: code of encoder and decoder in rs(255,239) serial parallel decoder AHA4524 8 TO 64 DECODER block diagram of 2 to 4 decoder
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AHA4524 AHA4524 AHA4524A-031 PB4524 code of encoder and decoder in rs(255,239) serial parallel decoder 8 TO 64 DECODER block diagram of 2 to 4 decoder | |
FINISAR WSSContextual Info: EWP Edge Wavelength Processor WSS FeATUreS LCoS Switching Technology Network Systems ready DPrAM and Serial interface Supports in-Service Firmware Upgrade roADM or X-Connect Building Block Cascadable Add/Drop Functionality Low Degree interconnect |
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ERF-050-05 0-01-L-RA-TR FINISAR WSS | |
4x4 unsigned multiplier VERILOG coding
Abstract: vhdl code for lvds driver 80C31 instruction set 4x4 signed multiplier VERILOG coding image enhancement verilog code verilog code of 4 bit magnitude comparator XC2V1000 Pin-out vhdl code of 32bit floating point adder verilog code for stop watch VHDL CODE FOR HDLC controller
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XC2V1000-4 UG002 4x4 unsigned multiplier VERILOG coding vhdl code for lvds driver 80C31 instruction set 4x4 signed multiplier VERILOG coding image enhancement verilog code verilog code of 4 bit magnitude comparator XC2V1000 Pin-out vhdl code of 32bit floating point adder verilog code for stop watch VHDL CODE FOR HDLC controller | |
BMA 150
Abstract: STS-192 STS-48 TFEC0410G MC68360 MPC860 wiper 100 pll 16-POL
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TFEC041OG TFEC0410G DS02-232SONT BMA 150 STS-192 STS-48 MC68360 MPC860 wiper 100 pll 16-POL | |
IC 4033 pin configuration
Abstract: 5 to 32 decoder Decoder 5 to 32 single ic AHA4524A-031 32 line to 5 encoder IC 5 to 32 decoder circuit AHA4524A-031PTI Decoder 5 to 32 AHA4524 PS-4524
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AHA4524 PS4524 100nF) 100nF IC 4033 pin configuration 5 to 32 decoder Decoder 5 to 32 single ic AHA4524A-031 32 line to 5 encoder IC 5 to 32 decoder circuit AHA4524A-031PTI Decoder 5 to 32 AHA4524 PS-4524 | |
VIRTEX-4
Abstract: Virtex-4 datasheet Virtex-4 SF363 FFG676 DS112 DSP48 sf363 PPC405 XC4VLX100 XC4VLX15
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DS112 DS302) XC4VFX40 FF676 XC4VLX40, XC4VLX60, XC4VSX25, XC4VSX35, VIRTEX-4 Virtex-4 datasheet Virtex-4 SF363 FFG676 DS112 DSP48 sf363 PPC405 XC4VLX100 XC4VLX15 | |
AHA4524A-031
Abstract: aha4524 AHA4524A-031PTC ANTPC03 LCA-16 PB4540 Quadrature Decoder Interface ICs PS4501 PS4524 Demodulator 256 QAM
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AHA4524 PS4524 100nF) 100nF AHA4524A-031 aha4524 AHA4524A-031PTC ANTPC03 LCA-16 PB4540 Quadrature Decoder Interface ICs PS4501 Demodulator 256 QAM | |
DS112
Abstract: FFG676 Virtex-4 SF363 IBM powerpc 405 virtex 2 Virtex-4 OPTIMIZED FPGA IMPLEMENTATION OF MULTI-RATE FIR F SFG363 virtex 4 Virtex-4 datasheet PPC405
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DS112 FF676 XC4VLX40, XC4VLX60, XC4VSX25, XC4VSX35, XC4VFX12 DS302, XCN09028, XC4VLX25 DS112 FFG676 Virtex-4 SF363 IBM powerpc 405 virtex 2 Virtex-4 OPTIMIZED FPGA IMPLEMENTATION OF MULTI-RATE FIR F SFG363 virtex 4 Virtex-4 datasheet PPC405 | |
Turbo decoder Xilinx
Abstract: xilinx lte TURBO decoder CRC lte TB lte LTE uplink XMP024 turbo decoder automatic repeat request redundancy version
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XMP024 Turbo decoder Xilinx xilinx lte TURBO decoder CRC lte TB lte LTE uplink turbo decoder automatic repeat request redundancy version | |
LCA-16
Abstract: AHA4522a Quadrature Decoder Interface ICs 24 pin outputs decoder ic aha4524 block diagram of 2 to 4 decoder Decoder 5 to 32 single ic hamming encoder/decoder 1 bit error correction PB4540 pin diagram of 2 to 4 decoder
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AHA4522 PS4522 100nF) 100nF LCA-16 AHA4522a Quadrature Decoder Interface ICs 24 pin outputs decoder ic aha4524 block diagram of 2 to 4 decoder Decoder 5 to 32 single ic hamming encoder/decoder 1 bit error correction PB4540 pin diagram of 2 to 4 decoder |