BD 4070 TRANSISTOR Search Results

Bd 4070 transistor

Abstract: 4077B 4070B 40xx cmos cmos 40xx 4077BM
Contextual Info: C O S /M O S IW TFR R ATFn C IRC U ITS A r ^ >' 7 - \ ^ * 7 ' 7 p> 8 „ HCC/HCF 4070B • m r n r m . 4070B - Q U A D E X C L U S IV E -O R G A TE 4077B - Q U A D E X C L U S IV E -N O R G A TE • • • • • • M ED IU M -S PEE D O PE R ATIO N tp HL= t P L H = 70 ns (TYP. A T V c c = 10V, CL = 50 pF

Contextual Info: C O S /M O S IN T EG R A T ED CIRCUITS p> ÀZ Ì L O T T 'S „ Eh cf S b HCC/HCF 4077B 4070B - QUAD EXCLUSIVE-O R GATE 4077B - QUAD EXCLUSIVE-NO R GATE • • • • • • MEDIUM-SPEED OPERATION tpHL= tp LH= 70 ns TYP. AT V cc = 10V, CL= 50 pF QUIESCENT CURRENT SPECIFIED TO 20V FOR HCC DEVICE

thermistor ntc 10k

Abstract: NTC 5,0
Contextual Info: LTC4070 Li-Ion/Polymer Shunt Battery Charger System FEATURES n n n n n n n n n DESCRIPTION Low Operating Current 450nA 1% Float Voltage Accuracy Over Full Temperature and Shunt Current Range 50mA Maximum Internal Shunt Current (500mA with External PFET)

solar charger schematic 24V

Abstract: solar charger schematic 12V g14 NTC NTC 1K 4070 CMOS Bd 4070 transistor 4070 data sheet solar charger schematic diagram solar shunt regulator fdn352ap
Contextual Info: LTC4070 Li-Ion/Polymer Shunt Battery Charger System FEATURES DESCRIPTION n The LTC 4070 allows simple charging of Li-Ion/Polymer batteries from very low current, intermittent or continuous charging sources. The 450nA to 50mA operating current makes charging possible from previously unusable

thermistor ntc 10k

Contextual Info: LTC4070 Li-Ion/Polymer Shunt Battery Charger System FEATURES DESCRIPTION n The LTC 4070 allows simple charging of Li-Ion/Polymer batteries from very low current, intermittent or continuous charging sources. The 450nA to 50mA operating current makes charging possible from previously unusable

NTHS0402N02N1002F

Abstract: solar charger schematic 24V NTHS0805N02N1002F solar charger schematic nimh MP5650 solar charger schematic 12V solar pv schematic ntc 10K B 3950 LTC4070EDDB solar charger schematic diagram
Contextual Info: LTC4070 Li-Ion/Polymer Shunt Battery Charger System Features Low Operating Current 450nA n 1% Float Voltage Accuracy Over Full Temperature and Shunt Current Range n 50mA Maximum Internal Shunt Current (500mA with External PFET) n Pin Selectable Float Voltage Options:

solar charger schematic 24V

Abstract: NTHS0402E3103LT solar charger schematic 12V NTC 1K MP5650 LTC4071 automatic solar 12v charger NTC 33 g14 NTC NTHS0805E3103LT
Contextual Info: LTC4070 Li-Ion/Polymer Shunt Battery Charger System FEATURES DESCRIPTION n The LTC 4070 allows simple charging of Li-Ion/Polymer batteries from very low current, intermittent or continuous charging sources. The 450nA to 50mA operating current makes charging possible from previously unusable

4070b

Abstract: jo 4070 4077B Voo-14 HCF40XX
Contextual Info: nno/unt- llU b /m U b s G S-THOMSON 07C D I 7 ^ 5 3 7 ; '’ Onmasa 6 | i,nA,.lnr ^ INTEGRATED CIRCUITS ' ‘41 C 08872 D T -V 3 ¿V 4070B - QUAD EXCLU SIVE-O R GATE 4077B - QUAD EXCLUSIVE-NO R GATE • • • • • • M E D IU M -S P E E D O P E R A T IO N tpH L= tPLH = 70 ns TYP. A T V c c = 10V, C L = 50 pF

4070B

Contextual Info: nno/unt- llU b /m U b s G S-THOMSON 07C D I 7^ 5 3 7 ; '’ Onmasa 6 | i,nA,.lnr ^ INTEGRATED CIRCUITS ' ‘41 C 08872 D T -V 3 ¿V 4070B - QUAD EXCLU SIVE-O R GATE 4077B - QUAD EXCLUSIVE-NO R GATE • • • • • • M E D IU M -S P E E D O P E R A T IO N tpH L= t P L H = 70 ns TYP. A T V c c = 10V, C L = 50 pF

socket 775 pinout

Contextual Info: MC10E158, MC100E158 5V ECL 5-Bit 2:1 Multiplexer The MC10E/100E158 contains five 2:1 multiplexers with differential outputs. The output data are controlled by the Select input SEL . The 100 Series contains temperature compensation. • • • • • •

C 3355 transistor

Contextual Info: MC10E122, MC100E122 5V ECL 9-Bit Buffer The MC10E/100E122 is a 9-bit buffer. The device contains nine non-inverting buffer gates. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V

Contextual Info: MC10E166, MC100E166 5V ECL 9-Bit Magnitude Comparator The MC10E/100E166 is a 9-bit magnitude comparator which compares the binary value of two 9-bit words and indicates whether one word is greater than, or equal to, the other. The 100 Series contains temperature compensation.

transistor Bd 575

Contextual Info: MC10E212, MC100E212 5V ECL 3-Bit Scannable Registered Address Driver The MC10E/100E212 is a scannable registered ECL driver typically used as a fan-out memory address driver for ECL cache driving. In a VLSI array based CPU design, use of the E212 allows the user to

C 3355 transistor

Contextual Info: MC10E131, MC100E131 5V ECL 4-Bit D Flip-Flop The MC10E/100E131 is a quad master-slave D-type flip-flop with differential outputs. Each flip-flop may be clocked separately by holding Common Clock CC LOW and using the Clock Enable (CE) inputs for clocking. Common clocking is achieved by holding the CE

marking CODE D2B

Contextual Info: MC10E457, MC100E457 5V ECL Triple Differential 2:1 Multiplexer The MC10E457/100E457 is a 3-bit differential 2:1 multiplexer. The fully differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. The higher frequency outputs provide the device with a > 1.0 GHz

ic lm 3525

Abstract: IC LM 3210 lm 4050 ic 4050 spice MC100E122 MC100E122FN MC100E122FNR2 MC10E122 MC10E122FN MC10E122FNR2
Contextual Info: MC10E122, MC100E122 5VĄECL 9ĆBit Buffer The MC10E/100E122 is a 9-bit buffer. The device contains nine non-inverting buffer gates. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC= 4.2 V to 5.7 V

MC100E101

Abstract: MC100E101FN MC100E101FNR2 MC10E101 MC10E101FN MC10E101FNR2
Contextual Info: MC10E101, MC100E101 5VĄECL Quad 4ĆInput OR/NOR Gate The MC10E/100E101 is a quad 4-input OR/NOR gate. The 100 Series contains temperature compensation. • 500 ps Max. Propagation Delay • PECL Mode Operating Range: VCC= 4.2 V to 5.7 V • http://onsemi.com

ksd 302 250v, 10a

Abstract: irf 5630 transistor 2SB 367 IRF 3055 AC153Y transistor ESM 2878 TIP 43c transistor 2sk116 bf199 bd643
Contextual Info: 5 transistor 1 A-Z datenlexikon data dictionary lexique de donnees enciclopedia dati lexicon de datos vergleichstabelle comparison table table d'equivalence tabella comparativa tabla comparativa ISBN 3-927486-00-0 Dieses Buch ist hinterlegt und urheberrechllich geschutzt. Alle

E212 transistor

Abstract: E112 E212 MC100E112 MC100E112FN MC10E112 MC10E112FN MC10E112FNR2 D200-400
Contextual Info: MC10E112, MC100E112 5VĄECL Quad Driver The MC10E/100E112 is a quad driver with two pairs of OR/NOR outputs from each gate, and a common, buffered enable input. Using the data inputs the device can serve as an ECL memory address fan-out driver. Using just the enable input, the device serves as a clock

marking CODE D2B

Abstract: MC100E104 MC100E104FN MC100E104FNR2 MC10E104 MC10E104FN MC10E104FNR2 marking D3B ECL IC NAND
Contextual Info: MC10E104, MC100E104 5VĄECL Quint 2ĆInput AND/NAND Gate The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be

MC100E163

Abstract: MC100E163FN MC100E163FNR2 MC10E163 MC10E163FN MC10E163FNR2
Contextual Info: MC10E163, MC100E163 5VĄECL 2ĆBit 8:1 Multiplexer The MC10E/100E163 contains two 8:1 multiplexers with differential outputs and common select inputs. The select inputs SEL0, 1, 2 control which one of the eight data inputs (A0 – A7, B0 – B7) is propagated to the output.

MC100E154

Abstract: MC100E154FN MC100E154FNR2 MC10E154 MC10E154FN MC10E154FNR2
Contextual Info: MC10E154, MC100E154 5VĄECL 5ĆBit 2:1 MuxĆLatch The MC10E/100E154 contains five 2:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables LEN1, LEN2 are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL. A logic HIGH on

E112

Abstract: E212 MC100E212 MC100E212FN MC100E212FNR2 MC10E212 MC10E212FN MC10E212FNR2 E212 transistor
Contextual Info: MC10E212, MC100E212 5VĄECL 3ĆBit Scannable Registered Address Driver The MC10E/100E212 is a scannable registered ECL driver typically used as a fan-out memory address driver for ECL cache driving. In a VLSI array based CPU design, use of the E212 allows the user to

MC100E157

Abstract: MC100E157FN MC100E157FNR2 MC10E157 MC10E157FN MC10E157FNR2
Contextual Info: MC10E157, MC100E157 5VĄECL Quad 2:1 Multiplexer The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select SEL inputs. The individual select control makes the devices well suited for random logic designs.