B1111111111 Search Results

Contextual Info: Micrel 2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY WITH FINE TUNE CONTROL Precision Edge SY89296U Precision Edge™ SY89296U FEATURES • Precision LVPECL programmable delay line ■ Guaranteed AC performance over temperature and voltage: • > 1.5GHz fMAX

Broken Conductor Detection for Overhead Line Distribution System

Abstract: verilog code for CORDIC to generate sine wave verilog code for cordic algorithm for wireless la TXC 13.56 sma diode h5c intel 945 motherboard schematic diagram 2005Z fet k241 EARTH LEAKAGE RELAY diagram schematic diagram for panasonic inverter air cond
Contextual Info: Stratix GX Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 408 544-7000 www.altera.com SGX5V1-1.2 Copyright 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and

SY89296UTITR

Abstract: MC100EP195 SY89295U SY89296U SY89296UMI SY89296UMITR SY89296UTI 16ML
Contextual Info: Micrel 2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY WITH FINE TUNE CONTROL Precision Edge SY89296U Precision Edge™ SY89296U FEATURES • Precision LVPECL programmable delay line ■ Guaranteed AC performance over temperature and voltage: • > 1.5GHz fMAX

Contextual Info: Micrel, Inc. 2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY Precision Edge SY89295U ® Precision Edge SY89295U FEATURES • Precision LVPECL programmable delay line ■ Guaranteed AC performance over temperature and voltage: • > 1.5GHz fMAX • < 160ps rise/fall times

Contextual Info: 1 1 1 1 23443514367128397123ABC1 2DE2F64C1 1 1 1 1 1 1 31  11 11 123456278 23452341678918A6BC1DB9EF13313CBF1 718ABA611BBC91

Cortex-A8

Abstract: verilog code for dual port ram with axi interface southbridge block diagram ARM Cortex A8 ARM Cortex-A8 PEX8114 ARM Cortex A15 southbridge diode z104 8a10 mic
Contextual Info: RealView Platform Baseboard for Cortex -A8 HBI-0178 HBI-0176 HBI-0175 User Guide Copyright 2008-2010 ARM Limited. All rights reserved. ARM DUI 0417C RealView Platform Baseboard for Cortex-A8 User Guide Copyright © 2008-2010 ARM Limited. All rights reserved.

Contextual Info: 1 1 234567381 • • • • • • • • • • • • • • • • • • 9A574BCDE31DF651A543174F3111DF1 65651145111 !1"4#$1 %&'1 D73 5D31*+,*-.1."AD4F51 /1"DFD"6"1A4E17306D73E1 1C123D251B1$33415$""61"4#$1

SY89295UTITR

Abstract: SY89296U SY89295U SY89295UMI SY89295UMITR SY89295UTI MIC100EP195
Contextual Info: Micrel 2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY Precision Edge SY89295U Precision Edge™ SY89295U FEATURES • Precision LVPECL programmable delay line ■ Guaranteed AC performance over temperature and voltage: • > 1.5GHz fMAX • < 160ps rise/fall times

Contextual Info: Micrel, Inc. 2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY WITH FINE TUNE CONTROL Precision Edge ® SY89296U Precision Edge SY89296U FEATURES • Precision LVPECL programmable delay line ■ Guaranteed AC performance over temperature and voltage:

verilog code for cdma transmitter

Abstract: verilog code for matrix inversion 15-bit* pn sequence digital mixer verilog code code for pn generator in digital PN generator circuit 4 bit pn sequence generator verilog code cdma pn sequence generator verilog code digital radio verilog code
Contextual Info: Maxim > App Notes > WIRELESS, RF, AND CABLE Keywords: CDMA, verilog, waveform, transmit May 01, 2002 APPLICATION NOTE 918 CDMA Reverse-Link Waveform Generator FPGA for Production Transmit Path Tests Abstract: Maxim has designed an easy-to-build CDMA baseband-modulation generator for circuit evaluation of

Contextual Info: Micrel 2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY Precision Edge SY89295U Precision Edge™ SY89295U FEATURES • Precision LVPECL programmable delay line ■ Guaranteed AC performance over temperature and voltage: • > 1.5GHz fMAX • < 160ps rise/fall times

Contextual Info: Micrel 2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY WITH FINE TUNE CONTROL Precision Edge SY89296U Precision Edge™ SY89296U FEATURES • Precision LVPECL programmable delay line ■ Guaranteed AC performance over temperature and voltage: • > 1.5GHz fMAX

Contextual Info: Micrel 2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY Precision Edge SY89295U Precision Edge™ SY89295U FEATURES • Precision LVPECL programmable delay line ■ Guaranteed AC performance over temperature and voltage: • > 1.5GHz fMAX • < 160ps rise/fall times

verilog code for Modified Booth algorithm

Abstract: verilog code pipeline ripple carry adder verilog TCAM code 4x4 unsigned multiplier VERILOG coding 4-bit AHDL adder subtractor "Galois Field Multiplier" verilog 3-bit binary multiplier using adder VERILOG verilog codes for 64-bit sqrt carry select adder verilog code for adaptive cordic rotator algorithm in vector mode 32 bit carry select adder code
Contextual Info: Advanced Synthesis Cookbook A Design Guide for Stratix II, Stratix III, and Stratix IV Devices 101 Innovation Drive San Jose, CA 95134 www.altera.com MNL-01017-5.0 Software Version: Document Version: Document Date: 9.0 5.0 July 2009 Copyright © 2008 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

VR4131

Abstract: NEC VR4131 GHS multi CN10 CN17 MIPS16 N-Wire
Contextual Info: Preliminary User’s Manual startWARE-GHS-VR4131 Starter Kit VR4131 Document No. U16417EE1V0UM00 Date Published February 2003  NEC Corporation 2003 Printed in Germany The information in this document is subject to change without notice. No part of this document may

VT6510

Abstract: VT6510A "filtering database" 12H7 "embedded dram" tsmc
Contextual Info: VIA Technologies, Inc. Preliminary VT6510/VT6510A Datasheet VT6510/VT6510A > 8 PORTS 10/100BASE-T/TX 2 PORTS 10/100/1000BASE-T/TX ETHERNET SWITCH CONTROLLER REVISION ‘A2’ DATASHEET ISSUE 3: Sep. 19, 2001 VIA Technologies, Inc. > VT6510A is a derivative version of VT6510 for dumb or smart layer-2 switch applications.

arm cortex a9

Abstract: cortex A9 cortex-a9 Dual-core ARM Cortex-A9 CPU DMC 269 HBI0183 ARM cortex A9 neon PROCESSOR CORTEX-A9 ARM Cortex-A9 ARM JTAG cortex a9
Contextual Info: RealView Platform Baseboard Explore for Cortex -A9 HBI-0182 baseboard and HBI0183 (daughterboard) User Guide Copyright 2009 ARM Limited. All rights reserved. ARM DUI 0440A (ID042309) RealView Platform Baseboard Explore for Cortex-A9 User Guide

C812C

Contextual Info: 1 1 1 2334153678197ABC343DE7F 2334153678197ABC343DE7F1 97ABC343DE7F1 1 2345667589AB3CD1EF561176B56B1 1 1 65B6F1 • • • • • • • • • • • • • • • • • • 5B93613751561B761 1!1"#$371 %551&'&1$151 1 *1(+,1-4'1

Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT /¿PD45128441, 45128841, 45128163 128M-bit Synchronous DRAM 4-bank, LVTTL Description The ,uPD45128441, 45128841, 45128163 are high-speed 134,217,728-bit synchronous dynamic random-access memories, organized as 8,388,608 x 4 x 4, 4,194,304 x 8 x 4, 2,097,152 x 16 x 4 word x bit x bank , respectively.

bcd to 7 segment converter

Abstract: T-bird traffic light controller vhdl D400 O8 BCD-7SEG vhdl code 16 bit LFSR VHDL code for traffic light controller A71D h0009C Q15T
Contextual Info: APPLICATION NOTE CPLDs Philips Hardware Description Language models of commonly used digital functions Preliminary Programmable Logic Software 1996 Oct 09 Philips Semiconductors Preliminary PHDL models of commonly used digital functions CPLDs INTRODUCTION

RTL code for ethernet

Abstract: transistor h5c verilog code of prbs pattern generator barrel shifter block diagram free verilog code of prbs pattern generator verilog code for 10 gb ethernet SGX52001-1 SGX52005-1
Contextual Info: Section I. Stratix GX Transceiver User Guide This section provides information on the configuration modes for Stratix GX devices. It also includes information on testing, Stratix GX port and parameter information, and pin constraint information. This section includes the following chapters:

PLB2224

Abstract: motorola smd codes relay cross reference gvrp ic SMD MARKING CODE ad 5.9 UP 130 L10B design of sequential timer to switch on off AD12 AR2224 CMAC
Contextual Info: Da ta S he et , D S 1, J un e 2 00 2 GREEN 24+2G Ethernet Switch on Chip PLB 2224 Version 1.3 Wi r ed Communications N e v e r s t o p t h i n k i n g . Data Sheet Revision History: 2002-06-03 Previous Version: 01.01 Page Subjects major changes since last revision

SY89295U

Abstract: SY89295UMI SY89295UMITR SY89295UTI SY89295UTITR SY89296U MIC100EP195
Contextual Info: Micrel 2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY Precision Edge SY89295U Precision Edge™ SY89295U FEATURES • Precision LVPECL programmable delay line ■ Guaranteed AC performance over temperature and voltage: • > 1.5GHz fMAX • < 160ps rise/fall times

LT1963

Abstract: EV-2101CA ROCKETIO XC2064 XC3090 XC4005 XC5210 RPT007 10G serdes 2.5 xaui xx1002
Contextual Info: RocketIO X Transceiver User Guide UG035 v2.0 February 22, 2007 R R “Xilinx” and the Xilinx logo shown above are registered trademarks of Xilinx, Inc. Any rights not expressly granted herein are reserved. CoolRunner, RocketChips, Rocket IP, Spartan, StateBENCH, StateCAD, Virtex, XACT, XC2064, XC3090, XC4005, and XC5210 are