AY DMS HI BMS Search Results

Contextual Info: JON 4 ANALOG ► DEVICES FEATURES Complete 50 MHz DSP Microcomputer ADSP-2100 Code & Function Compatible 2K Words of Program Memory RAM 1K Word of Data Memory RAM Separate Program and Data Buses On-Chip Dual Purpose Program Memory for Both Instruction and Data Storage

IC SEM 2105

Abstract: sem 2105 16 pin sp2111 ay dms hi bms ADSP-2115-BP-55 OP marking code D22 adsp 21xx processor SP-2111 ADSP21XX block diagram ADSP-2101
Contextual Info: ANALOG DEVICES ADSP-2100 Family DSP Microcomputers ADSP-21XX FUNCTIONAL BLOCK DIAGRAM SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/

Contextual Info: ADSP-2111 March 1990 For current information contact Analog Devices at 617 461-3881 FEATURES 77 ns Instruction Cycle with Sustained 13 MIPS Performance 100-Pin PGA and 100-Lead PQFP ANALOG DEVICES This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog Devices

LS-16M

Abstract: ADSP-2101 XCKM ADSP-2100 ADSP2101BG66 D1742 ADSP-2101KG-50
Contextual Info: ANALOG DEVICES INC Mfc,E D E3 OfllbfiOO D Q a HlSa 2 S A N A -r-¥?-/z^ AMALOG DEVICES DSP Microcomputer ADSP-2101 FEATURES Complete DSP Microcomputer 60 ns Instruction Cycle Time from 16.67 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM

pms 1-7-7

Abstract: "vector instructions" saturation
Contextual Info: •n o : e r 1; in c bÆE B E3 OôltôOD 003öfi4U SII ANALOG ► DEVICES FEATURES Complete DSP Microcomputer 3.3 V Version of Industry Standard ADSP-2101 77 ns Instruction Cycle Time from 13 MHz Crystal 65 mW Maximum Active Power Dissipation at 3.3 V 10 mW Maximum IDLE Power Dissipation at 3.3 V

Contextual Info: JAN 1 7 1992 ► ANALOG D EVICES FEATURES Com plete DSP M icrocom puter 60 ns Instruction Cycle Tim e from 16.67 M H z Crystal ADSP-2100 Family Code & Function Com patible 2K Words of On-Chip Program M em ory RAM IK Word of On-Chip Data M em ory RAM Separate Program and Data Buses On-Chip

STR - Z 2062

Abstract: ADSP-2101
Contextual Info: ANALOG ► DEVICES FEATURES Complete DSP Microcomputer 60 ns Instruction Cycle Time from 16.67 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM 1K Word of On-Chip Data Memory RAM Separate Program and Data Buses On-Chip

Contextual Info: ANALOG ► DEVICES ADSP-2100 Family DSP Microcomputers ADSP-21XX FUNCTIONAL BLOCK DIAGRAM SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/

LT 2105

Abstract: adsp 21xx processor advantages ADSP-2105BP-40 ADSP2105KP40 ADSP-2105 data address generator 2105 ADSP-2105 ADSP-2101 ADSP-2105KP-40 ADSP2105BP40
Contextual Info: ► ANALOG DEVICES DSP Microcomputer FEATURES Com plete DSP Microcom puter 100 ns Instruction Cycle Tim e from 10 M H z Crystal ADSP-2100 Code- & Function-Compatible ADSP-2101 Pin-Compatible 1K Words of On-Chip Program M em ory RAM 512 Words of On-Chip Data M em ory RAM

ADSP-2105

Contextual Info: ADSP-2105 March 1990 For current information contact Analog Devices at 617 461-3881 ADSP-2105 DSP Microcomputer FEATURES 100 ns Instruction Cycle with Sustained 10 MIPS Performance ADSP-2100 Family Extension; Code-Compatible ADSP-2101 Pin-Compatible IK Words of On-Chip Program Memory RAM

Contextual Info: JÄN 1 7 1992 DSP Microcomputer with Host Interface Port ADSP-2111 ANALOG ► DEVICES FUNCTIONAL BLOCK DIAGRAM FEATURES Complete DSP Microcomputer 60 ns Instruction Cycle Time from 16.67 MHz Crystal ADSP-2100 Family Code & Function Compatible 2K Words of On-Chip Program Memory RAM

ADSP-2115

Contextual Info: ANALOG DEVICES AD SP-2100 Family DSP Microcomputers ADSP-21 xx SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/

Contextual Info: ANALOG ► DEVICES DSP Microcomputer ADSP-2105 FEATURES Complete DSP Microcomputer 100 ns Instruction Cycle Time from 10 MHz Crystal ADSP-2100 Code- & Function-Compatible ADSP-2101 Pin-Compatible 1K Words of On-Chip Program Memory RAM 512 Words of On-Chip Data Memory RAM

sem 2105 16 pin

Contextual Info: ADSP-2100 Family DSP Microcomputers ADSP-21XX ANALOG DEVICES SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/

Contextual Info: NANALOG WDEVICES ADSP-2111 User's Manual Architecture - ~~-~-~-~-~-~- You may contact the Digital Signal Processing Division in the following ways: By contacting your local Analog Devices Sales Representative For Marketing information, call 617 461-3881 in Norwood,

Contextual Info: September 1996 ADSP-2185/ADSP-2185L Preliminaiy Data Sheet For current information contact Analog Devices at 617 461-3881 ADSP-2185/ADSP-2185L DSP Microcomputers FEATURES Performance • 30 n s I n s t r u c t i o n C y c le T im e @ 5.0 V o lts , 33 M IP S S u s ta in e d P e r f o r m a n c e

Contextual Info: ANALOG DEVICES Multi-Port Internet Gateway Processor Preliminary Technical Data ADSP-21mod970 FEATURES Performance • C om plete Single-C hip M ulti-P ort Internet G atew ay P rocessor N o E xternal M em ory R equired • • Im plem ents Six M odem Channels in O ne P ackage

ADSP21MSP59

Contextual Info: ANALOG DEVICES DSP Microcomputers ADSP-21msp58/59 FEATURES 38 ns Instruction Cycle Tim e 26 MIPS from 13.00 M Hz Crystal ADSP-2100 Family Code and Function Com patible w ith New Instruction Set Enhanced for Bit Manipulation Instructions, Multiplication Instructions, Biased

388F

Contextual Info: ADSP-2171 November 1993 For current information contact Analog Devices at 617 461-3881 ADSP-2171 DSP Microc FEATURES • 30 ns Instruction Cycle Time from 16.67 MHz Crystal <1 5.0 Volts • 33 MIPS Sustained Performance • ADSP-2100 Family Code & Function Compatible with

Contextual Info: ANALOG DEVICES DSP Microcomputer ¿DSP-2183 FUNCTIONAL BLOCK DIAGRAM FEATURES PERFORMANCE 19 ns Instruction Cycle Time from 26.32 MHz Crystal @ 3.3 Volts 52 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture Allows Dual Operand Fetches in

MIPS26

Abstract: adsp21msp59 HA20 27C512 DIL
Contextual Info: A N A LO G ► D E V IC E S FEATURES 38 ns Instruction Cycle Tim e 26 MIPS from 13.00 MHz Crystal ADSP-2100 Family Code and Function Com patible w ith N ew Instruction Set Enhanced for Bit Manipulation Instructions, M ultiplication Instructions, Biased Rounding, and Global Interrupt Masking

il6c

Contextual Info: ANALOG DEVICES Preliminary Technical Data FEATURES PERFORMANCE 25 ns Instruction Cycle Tim e 40 MIPS Sustained Performance Single-Cycle Instruction Execution Single-Cycle Context Switch 3-Bus Architecture A llow s Dual Operand Fetches in Every Instruction Cycle

DSP-2101

Abstract: LT 2105 ADSP-2101 2101S dsp210 IC SAM 2105
Contextual Info: ANALOG DEVICES DSP Microcomputer ADSP-2105 FEATURES Complete DSP Microcomputer 100 ns Instruction Cycle Time from 10 MHz Crystal ADSP-2100 Code- & Function-Compatible ADSP-2101 Pin-Compatible 1K Words of On-Chip Program Memory RAM 512 Words of On-Chip Data Memory RAM

sp2111

Abstract: SP-2111 plc analog em 231 ADSP-2115-BP-55 marking YJ AM marking code BM 68A
Contextual Info: ANALOG DEVICES □ ADSP-2100 Family DSP Microcomputers ADSP-21 xx FUNCTIONAL BLOCK DIAGRAM SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/