AVR1304
Abstract: DMAC
Contextual Info: AVR1304: Using the XMEGA DMA Controller Features • • • • • • • • • Four separate DMA channels Flexible channel priority selection Three addressing modes: static, increment, and decrement Source and/or destination address reload capabilities
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AVR1005: Getting started with XMEGA
Abstract: Application Notes xmega 128 xmega 128 A1 xmega 16 A4 XMEGA Application Notes xmega 128 a3 AVR1005 AVR1302 xmega a3* pdi
Contextual Info: AVR1005: Getting started with XMEGA Features • • • • • XMEGA vs. megaAVR XMEGA feature and peripherals Tool-chain - programming and debugging In-system Programming Hardware design considerations 1 Introduction 8-bit Microcontrollers Application Note
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avr10058169b-avr-11/09avr1005: getting started with xmegaapplication notes+7xmega 128xmega 128 a1xmega 16 a4xmega application notesxmega 128 a3avr1302xmega a3* pdi
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AVR1307: Using the XMEGA USART
Abstract: USART applications AVR1307 AVR1304 Atmel AVR XMEGA dma
Contextual Info: AVR1307: Using the XMEGA USART Features • Setup and use of the USART • Code examples - Polled USART - Interrupt controlled USART 8-bit Microcontrollers Application Note 1 Introduction The USART Universal Synchronous Asynchronous Receiver Transmitter is the
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avr1307049a-avr-02/08avr1307: using the xmega usartusart applications+2avr1304atmel avr xmega dma
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AVR1301: Using the XMEGA DAC
Abstract: Application Notes sample code adc store avr AVR1301 AVR1303 sample code dac store avr 8033b AVR1304 xmega ADC AVR1000
Contextual Info: AVR1301: Using the XMEGA DAC Features • • • • • • 8-bit Microcontrollers 12 bit resolution Up to 1 M conversions per second Continuous drive or sample-and-hold output Built-in offset and gain calibration High drive capabilities Driver source code included
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avr13018033b-avr-04/08avr1301: using the xmega dacapplication notes+7sample code adc store avravr1303sample code dac store avr8033bavr1304xmega adcavr1000
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AVR121
Abstract: 8032d XMega 256 AVR1301 AVR120 xmega ADC AVR1300 AVR1304 sample code adc store avr XMEGA Application Notes
Contextual Info: AVR1300: Using the XMEGA ADC Features • • • • • • • • • • Up to 12 bit resolution Up to 2M samples per second Signed and unsigned mode Selectable gain Pipelined architecture Up to 4 virtual channels Result comparator Automatic calibration
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avr13008032d-avr-02/10avr1218032d+7xmega 256avr1301avr120xmega adcavr1304sample code adc store avrxmega application notes
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AVR121
Abstract: AVR1301 AVR1300 xmega ADC AVR1304 AVR1001 xmega 128 AVR120 XMega 256 Atmel AVR XMEGA dma
Contextual Info: AVR1300: Using the XMEGA ADC Features • • • • • • • • • • Up to 12 bit resolution Up to 2M samples per second Signed and unsigned mode Selectable gain Pipelined architecture 4 virtual channels Result comparator Automatic calibration Internal connection to DAC output
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avr13008032c-avr-09/09avr121avr1301+7xmega adcavr1304avr1001xmega 128avr120xmega 256atmel avr xmega dma
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MC310 schematic
Abstract: SOCKET TQFP100 tiny23 ATSTK504 ATSTK503 ATTINY44 AT32UC3A0512
Contextual Info: AVR Microcontrollers ATMEL CORPORATION AVR® Microcontrollers: Product Line Reference December 2008 Customer Edition Table of Contents 1 AVR Product Family . 2
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at32uc3bxavr32mc310 schematicsocket tqfp100+5tiny23atstk504atstk503attiny44at32uc3a0512
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Counter
Abstract: AVR1306 AVR1001 AVR1304 AVR1311 DIV1024 DIV256 AVR130 xmega ocd TCX0
Contextual Info: AVR1306: Using the XMEGA Timer/Counter Features • True 16 bit operation • Double buffered timer period setting • 4 2 compare or capture channels per timer - 4 channels on each Timer 0 - 2 channels on each Timer 1 - Double buffered • 32 bit operation with 32 bit input capture by timer cascading
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avr130616-bit804nts045a-avr-02/08+9counteravr1001avr1304avr1311div1024div256avr130xmega ocdtcx0
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AVR1318: Using the XMEGA built-in AES accelerator
Abstract: Application Notes add round key for aes algorithm key expansion for aes algorithm avr 256 aes AVR1318 AVR1304 XMega 256 AES with DMA Atmel AVR XMEGA dma
Contextual Info: AVR1318: Using the XMEGA built-in AES accelerator Features 8-bit Microcontrollers • Full compliance with AES FIPS Publication 197, 2002 - Both encryption and decryption procedures • 128-bit Key and State memory • XOR load option to State memory useful for cipher block coding
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avr1318128-bit106a-avr-04/08avr1318: using the xmega built-in aes accelerator+8application notesadd round key for aes algorithmkey expansion for aes algorithmavr 256 aesavr1304xmega 256aes with dmaatmel avr xmega dma
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AVR1315
Abstract: AVR1316 AVR101 AVR1304
Contextual Info: AVR1315: Accessing the XMEGA EEPROM Features • • • • • 8-bit Microcontrollers I/O-mapped access Memory-mapped access Split erase and write operations supported Efficient page-oriented access Driver source code included Application Note 1 Introduction
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avr1315066a-avr-04/08avr1316avr101+1avr1304
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0X0102
Abstract: AVR1316 AVR1008 AVR1315 8066b AVR101 AVR1304
Contextual Info: AVR1315: Accessing the XMEGA EEPROM Features • • • • • 8-bit Microcontrollers I/O-mapped access Memory-mapped access Split erase and write operations supported Efficient page-oriented access Driver source code included Application Note 1 Introduction
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avr1315a3/d3/256a3bavr10088066b-avr-es+68066b-avr-08/100x0102avr13168066bavr101avr1304
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Atmel AVR XMEGA dma
Abstract: xmega ADC AVR1001 AVR1301 sample code adc store avr XMEGA D AVR1305 AVR120 AVR121 AVR1304
Contextual Info: AVR1300: Using the XMEGA ADC Features • • • • • • • • • • Up to 12 bit resolution Up to 2M samples per second Signed and unsigned mode Selectable gain Pipelined architecture Up to 4 virtual channels Result comparator Automatic calibration
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avr13008032e-avr-10/10atmel avr xmega dmaxmega adc+8avr1001avr1301sample code adc store avrxmega davr1305avr120avr121avr1304
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