ATE DSC HA NG Search Results

18CT4

Contextual Info: DSC-644* B Q Q ILC DATA DEVICE CORPORATION_ _ _ 14 BIT D / S A N D D / R CONVERTER N e w Low -profile Industry Standard FEATURES • FULL Y PROTECTED OUTPUT: RUGGED OUTPUT AMPLIFIERS WITH CURRENT LIMITING COMPLET EL Y SHORT-CIRCUIT PROOF 0 VERVOLTAGE TRANSIENT

17556

Contextual Info: PACKAGE DIAGRAM [TLINES SIDEBRAZE DCN REV DATE _ DESCRIPTION_ 04 17553 05 22249 U PD ATE D TO S T A N D A R DI Z E CHANGED b1 MIN DWG ¿ S'ho^rnaA, 4/2/90 DIMENSION EATING PLANE b1 -12 APPROVED L1 NOTES: ( U NL E S S OTHERWI SE SPECI FI ED)

LM126

Abstract: QML-38535 5962-8993001MIA qml38535
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED Make change to output voltage test as specified in table I. - ro 98-10-23 R. MONNIN Make changes to paragraphs 3.1 and 3.5.1. -rrp 00-01 -25 R. MONNIN REV SHEET REV SHEET REV STATUS REV B B B B B B B B B OF SHEETS

Contextual Info: KM736V795 128Kx36 Synchronous SRAM D o c u m e n t T itle 128Kx36-Bit Synchronous Pipelined Burst SRAM R e y is io n - H is lo r y Rev. No. 0 .0 0.1 History Draft Date Initial d ra ft F e bru ary. 02. 1998 C h a n g e D C c h a ra c te ris tic s V d d c o n d itio n fro m V d d = 3 .3 V + 1 0 % /- 5 % C h a n g e

5962P99517

Abstract: 5962R9951704VYA qml-38535 LM117H LM117K LM137H LM137K 5962P9951701VXA
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA Add device types 03 and 04. -rrp APPROVED 99-11-15 R. Monnin REV SHEET REV A A A A SHEET 15 16 17 18 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 P M IC N /A PREPARED BY

mit-ss-02

Contextual Info: MITSUBISHI LSIs M 5 M 5 V 1 1 3 2 F P - 1 3 , - 1 5 , - 1 6 , - 2 0 , - 1 3 L , - 1 5 L , - 1 6 L , - 2 0 L 1Q48576-BIT 32768-WORD BY 32-BIT SYNCHRONOUS BURST SRAM DESCRIPTION The M 5 M 5 V 1 1 3 2 F P is a fam ily of 1M I it synchronous S R A M s organized as 3 2 7 6 8 -w o rd s of 32-b it. T h e v l5 M fiV 1 1 3 2 F P provides

Contextual Info: FIN A L a m h t i A \ l a l L # Ér Am79C30A/32A Digital Subscriber Controller DSC™ Circuit DISTINCTIVE CHARACTERISTICS • Combines CCITT 1.430 S/T-lnterface Transceiver, D-Channel LAPD Processor, Audio ■ Certified protocol software support available

rsn 3404

Abstract: cf -mh 22 e 103 m-c texas instruments data guide manual HIGH VOLTAGE ISOLATION DZ 2101 PEAK DETECTOR CIRC Transistor AND DIODE Equivalent list Scans-049 RRUS 32 b2 specs TIL Display transistor 381 7943 363AM
Contextual Info: a Telecommunication Products Data Book 1992/1993 Advanced Micro Devices Telecommunication Products Data Book 1 9 9 2 /1 9 9 3 D V A N C E D M I C R O D E V I C E S Î 1 1992 Advanced Micro Devices, Inc. Advanced Micro Devices reserves the right to make changes in its products

Contextual Info: W83877AF fL W X u li> r in b o n d Electronics Corp. WINBOND I/O GENERAL DESCRIPTION The W83877AF is an enhanced version from Winbond's most popular I/O chip W83877F — which integrates the disk drive adapter, serial port UART , IrDA 1.0 SIR, parallel port, IDE interface,

Contextual Info: CY7C1346 PRELIMINARY 64K x 36 Synchronous-Pipelined Cache RAM Features T he C Y 7 C 1 346 I/O pins can o p era te at eith e r the 2.5 V o r the 3 .3 V level; the I/O pins are 3.3 V to le ra n t w h en V DDQ=2.5V. • S u p p o rts 1 0 0-M H z bus fo r P en tiu m and Pow erPC

Contextual Info: SHHM & PRELIMINARY CY7C1335 32K X 32 Synchronous-Pipelined Cache RAM Features • S u p p o rts 1 0 0-M H z bus fo r P en tiu m and Pow erPC o p e ra tio n s w ith zero w a it states • F ully reg istered inp u ts and o u tp u ts fo r p ip elined o p e r­

ed15 smd

Abstract: ed17 SMD EA7 SMD QML-38535 EA6 SMD smd marking code je n7 EA21 marking Ed12 05P15 ed16 smd
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET 35 36 37 38 39 40 41 42 43 44 45 46 47 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 1 2 3 4 5 6 7 8 9 10 11 12 13 14 REV SHEET REV STATUS REV OF SHEETS SHEET PMIC N/A PREPARED BY Larry T. Gauder

AFB3

Contextual Info: VZÄ WC64P603EV-XQ3X WHITE /MICROELECTRONICS RISC603e MODULE, SECONDARY L2 CACH E ADVANCED * MAI N FEATURES Based on RISC 603e 3.3V M icroprocessor • Footprint c o m p a tib le w ith 603e jup CQFP package ■ Processor C lock Frequencies: 66.6, 8 0 ,1 0 0 M H z

7BDS

Abstract: tea 1601 t ADSP2101 MAX121 MAX121CAP MAX121CPE MAX121CWE TMS320 sick DS 50
Contextual Info: ADC w ith DSP In te rfa c e and 78dB SINAD The MAX121 is a co m p le te , BiCM O S, serial-output, sam ­ pling 14-bit a n a lo g -to -d ig ita l co nverter A D C that c o m ­ bines an o n -ch ip tra c k /h o ld and a low -drift, low-noise, b u rie d -z e n e r v o lta g e re fe re n ce w ith fa s t c o n v e rs io n

ADSP2101

Abstract: MAX121 MAX121CAP MAX121CPE MAX121CWE TMS320 assembly language program TMS320C30 Evaluation Module
Contextual Info: ADC w ith DSP In te rfa c e and 78dB SINAD The MAX121 is a complete, BiCMOS, serial-output, sam­ pling 14-bit analog-to-digital converter ADC that com ­ bines an on-chip track/hold and a low-drift, low-noise, buried-zener voltage reference with fast conversion

Contextual Info: ADC w ith DSP In te rfa c e and 78dB SINAD The MAX121 is a co m p le te , BiCM O S, serial-output, sam ­ pling 14-bit a n a lo g -to -d ig ita l co nverter A D C that c o m ­ bines an o n -ch ip tra c k /h o ld and a low -drift, low-noise, b u rie d -z e n e r v o lta g e re fe re n ce w ith fa s t c o n v e rs io n

z8010

Contextual Info: AmZ8010 ADVANCED MICRO DEVICES a Memory M anagem ent Unit Product Specification October 1980 DISTINCTIVE CHARACTERISTICS GENERAL DESCRIPTION • Complete Memory Management Function T he A m Z 8010 M em o ry M a n a g e m e n t U nit M M U is a highpe rfo rm an ce LSI pro du ct th a t adds sop histicated address tra n s ­

Contextual Info: Monolithic ANALOG DEVICES □ 12-Bit Quad DAC AD664 PIN CONFIGURATIONS FEATURES Four Complete Voltage Output DACs Data Register Readback Feature "Reset to Zero" Override Multiplying Operation Double-Buffered Latches Surface Mount and DIP Packages MIL-STD-883 Compliant Versions Available

Contextual Info: 128K x 18, 64K x 32/36 3.3V I/O, PI PELI NED, DCD S Y N C B U R S T SRAM MICRON I TECHNOLOGY, INC. C V K I P D I I D C O Y I M O D U n O CD O i l MT58LC128K18C5, MT58LC64K32C5, MT58LC64K36C5 T I A I UI n IV I 3.3V Supply, Pipelined, Double-Cycle Deselect Burst Counter and

Contextual Info: AD VA NC E 128Kx18>64Kx32/36 MICRON I Q w O | D I I D C T Y I M C D ^ 2.5V I/O, PI PELI NED, DCD S Y N C B U R S T SRAM A O D U n O MT58LC128K18F1, MT58LC64K32F1, MT58LC64K36F1 I I U| IV I 3.3V Supply, +2.5V I/O, Pipelined, Burst Counter and Double-Cycle Deselect

m2651

Contextual Info: STANDARD MICROSYSTEMS CORPORATION^ COM 2651 f i PC FAMILY Programmable Communication Interface PCI FEATURES □ Synchronous and Asynchronous Full Duplex or Half Duplex Operations □ Re-programmable ROM on-chip baud rate generator □ Synchronous Mode Capabilities

Contextual Info: ADVANCE M IC R O N 128K x 18>64K x 32/36 I 2. 5V I/O, P I P E L I N E D , S C D S Y N C B U R S T S R A M Q w | D I I D C T O Y I M O D U n O I C D ^ A ^ IU| i*l MT58LC128K18G1, MT58LC64K32G1, MT58LC64K36G1 3.3V Supply, +2.5V I/O, Pipelined, Burst Counter and Single-Cycle Deselect

TMS320C30 Evaluation Module

Abstract: ADSP2101 MAX121 MAX121CAP MAX121CPE MAX121CWE TMS320 max121ca ScansUX69
Contextual Info: ADC w ith DSP In te rfa c e and 78dB SINAD The MAX121 is a complete, BiCMOS, serial-output, sam­ pling 14-bit analog-to-digital converter ADC that com ­ bines an on-chip track/hold and a low-drift, low-noise, buried-zener voltage reference with fast conversion

Contextual Info: 64K x 18, 32K x 32/ 36 3. 3V I/O, P I P E L I N E D , S C D S Y N C B U R S T S R A M MICRON I TECHNOLOGY, INC. C V K I P D I I D C O Y I M O D U n O CD O i l MT58LC64K18D8, MT58LC32K32D8, MT58LC32K36D8 T I A I UI n IV I 3.3V Supply, Pipelined, Burst Counter and