AT17128 Search Results

AT27C64

Abstract: AT17128 DB25-Male-to-DB25-Female db25 female socket 0452C db25 socket finger print security transistor Common Base configuration 84 PLCC pin configuration db25 socket male
Contextual Info: Features • Prototype Board – PC/AT-Compatible Expansion Board Edge Connector – 84-pin PLCC High-Pressure Tin Socket with Solder Tails – 132-pin PQFP Micro Pitch Socket – Over 16 Square Inches of Wire Wrap Area – Test Point Headers for Easy Access to VCC, GND, and FPGA I/O Signals

AT27C64

Abstract: 27C010 AT17128 AT17C128 AT27C010 AT6002 trigger module
Contextual Info: Features • Prototype Board – PC/AT-Compatible Expansion Board Edge Connector – 84-pin PLCC High-Pressure Tin Socket with Solder Tails – 132-pin PQFP Micro Pitch Socket – Over 16 Square Inches of Wire Wrap Area – Test Point Headers for Easy Access to VCC, GND, and FPGA I/O Signals

AT27C64

Abstract: 27C010 AT17128 AT17C128 AT27C010 oscilloscope I/AT27C64
Contextual Info: FPGA Kit Features • • Prototype Board PC/AT-Compatible Expansion Board Edge Connector 84-Pin PLCC High-Pressure Tin Socket with Solder Tails 132-Pin PQFP Micro-Pitch Socket Over 16 Square Inches of Wire-Wrap Area Test-Point Headers for Easy Access to VCC, GND, and FPGA I/O Signals

AT27C64

Abstract: 27C010 AT17128 AT17C128 AT27C010 oscilloscope
Contextual Info: FPGA Kit Features x x Prototype Board PC/AT-Compatible Expansion Board Edge Connector 84-Pin PLCC High-Pressure Tin Socket with Solder Tails 132-Pin PQFP Micro-Pitch Socket Over 16 Square Inches of Wire-Wrap Area Test-Point Headers for Easy Access to VCC, GND, and FPGA I/O Signals

at27c64

Abstract: AT17128 DB25-Male-to-DB25-Female 821958-2 AT27CXXX db25 female socket db25 male pin db25 socket transistor Common Base configuration 84 PLCC pin configuration
Contextual Info: FPGA Kit Features • • Prototype Board PC/AT-Compatible Expansion Board Edge Connector 84-Pin PLCC High-Pressure Tin Socket with Solder Tails 132-Pin PQFP Micro-Pitch Socket Over 16 Square Inches of Wire-Wrap Area Test-Point Headers for Easy Access to VCC, GND, and FPGA I/O Signals

AD 4153

Abstract: AT17128 ad 8077 AT17XXX AT6002 AT6003 AT6005 AT6010 AT171 Vector Controls
Contextual Info: AT6000 Series AT6000 Series Configuration Configuration is the process of loading a design into an AT6000 Series field programmable gate array FPGA . AT6000 Series devices are SRAM-based and can be configured any number of times. The entire device or select portions of a design can be configured. Sections of the device can be configured while others continue to operate undisturbed.

Contextual Info: AT6000 Series Features • • • • • • • High Performance System Speeds > 1 0 0 MHz Flip-Flop Toggle Rates > 250 MHz 1.2 ns Input Delay 3.5 ns Output Delay Thousands of Registers Cache Logic Design Complete/Partial In-System Reconfiguration No Loss of Data or Machine State