ASM5CVF857 Search Results

ASM5CVF857 Datasheets (17)

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Alliance Semiconductor

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
ASM5CVF857		Alliance Semiconductor	Specialty Clock Management	Original	PDF	221.85KB	15
ASM5CVF857-28TR		Alliance Semiconductor	60 MHz to 200 MHz, 2.5 V wide-range frequency clock driver	Original	PDF	221.85KB	15
ASM5CVF857-28TT		Alliance Semiconductor	60 MHz to 200 MHz, 2.5 V wide-range frequency clock driver	Original	PDF	221.85KB	15
ASM5CVF857-28VR		Alliance Semiconductor	60 MHz to 200 MHz, 2.5 V wide-range frequency clock driver	Original	PDF	221.85KB	15
ASM5CVF857-28VT		Alliance Semiconductor	60 MHz to 200 MHz, 2.5 V wide-range frequency clock driver	Original	PDF	221.85KB	15
ASM5CVF857-40MR		Alliance Semiconductor	Logic ICS, 2.5V Wide-Range Frequency Clock Driver (60 MHz - 200 MHz), Tape And Reel	Original	PDF	394.31KB	14
ASM5CVF857-40MT		Alliance Semiconductor	Logic ICS, 2.5V Wide-Range Frequency Clock Driver (60 MHz - 200 MHz)	Original	PDF	394.31KB	14
ASM5CVF857-40QR		Alliance Semiconductor	60 MHz to 200 MHz, 2.5 V wide-range frequency clock driver	Original	PDF	221.85KB	15
ASM5CVF857-40QT		Alliance Semiconductor	60 MHz to 200 MHz, 2.5 V wide-range frequency clock driver	Original	PDF	221.85KB	15
ASM5CVF857-48TR		Alliance Semiconductor	Logic ICS, 2.5V Wide-Range Frequency Clock Driver (60 MHz - 200 MHz), Tape And Reel	Original	PDF	394.31KB	14
ASM5CVF857-48TT		Alliance Semiconductor	Logic ICS, 2.5V Wide-Range Frequency Clock Driver (60 MHz - 200 MHz)	Original	PDF	394.31KB	14
ASM5CVF857-48VR		Alliance Semiconductor	Logic ICS, 2.5V Wide-Range Frequency Clock Driver (60 MHz - 200 MHz), Tape And Reel	Original	PDF	394.31KB	14
ASM5CVF857-48VT		Alliance Semiconductor	Logic ICS, 2.5V Wide-Range Frequency Clock Driver (60 MHz - 200 MHz)	Original	PDF	394.31KB	14
ASM5CVF857-56BR		Alliance Semiconductor	Logic ICS, 2.5V Wide-Range Frequency Clock Driver (60 MHz - 200 MHz), Tape And Reel	Original	PDF	394.31KB	14

ASM5CVF857-56BR		Alliance Semiconductor	60 MHz to 200 MHz, 2.5 V wide-range frequency clock driver	Original	PDF	221.85KB	15
ASM5CVF857-56BT		Alliance Semiconductor	Logic ICS, 2.5V Wide-Range Frequency Clock Driver (60 MHz - 200 MHz)	Original	PDF	394.31KB	14
ASM5CVF857-56BT		Alliance Semiconductor	60 MHz to 200 MHz, 2.5 V wide-range frequency clock driver	Original	PDF	221.85KB	15

ASM5CVF857 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
ASM4SSTVF16857 Abstract: 48TT ASM4SSTVF16859 ASM4SSTVF32852 ASM5CVF857 ASM5CVF857-48TT PC3200 PCV857 Contextual Info: August 2004 ASM5CVF857 rev 1.2 2.5V Wide-Range Frequency Clock Driver 60MHz – 200MHz condition and perform the same low power features as Features and when the PDB input is low. When the input • Low skew; low jitter PLL clock driver. frequency increases to greater than approximately	Original	asm5cvf857 60mhz 200mhz 20mhz +7asm4sstvf16857 48tt asm4sstvf16859 asm4sstvf32852 asm5cvf857-48tt pc3200 pcv857	PDF
ASM4SSTVF16857 Abstract: 48TT ASM4SSTVF16859 ASM4SSTVF32852 ASM5CVF857 ASM5CVF857-48TR ASM5CVF857-48TT PC3200 terminal block in pdb 40mR Contextual Info: ASM5CVF857 November 2003 rev v1.0 2.5V Wide-Range Frequency Clock Driver 60 MHz - 200 MHz Features output differential clocks (CLKT[0:9], CLKC[0:9]). ASM5CVF857 is also able to track spread spectrum clock • Low skew; low jitter PLL clock driver. • 1 to 10 differential clock distribution (SSTL_2).	Original	asm5cvf857 40-pin asm5cvf857-40mr asm5cvf857m +9asm4sstvf16857 48tt asm4sstvf16859 asm4sstvf32852 asm5cvf857-48tr asm5cvf857-48tt pc3200 terminal block in pdb 40mr	PDF
AAAC Contextual Info: April 2004 ASM4SSTVF16857 rev 1.1 DDR 14-Bit Registered Buffer LVCMOS level at a valid logic state since VREF may Features • not be stable during power-up. Fully JEDEC JC40 - JC42.5 compliant for DDR1 applications to include: PC1600, PC2100, PC2700 To ensure that outputs are at a defined logic state	Original	14-bit asm4sstvf16857 pc1600 pc2100 +4pc2700 pc3200 200mhz aaac	PDF
ASM4SSTVF16857 Abstract: ASM4SSTVF16859 ASM4SSTVF32852 ASM5CVF857 Q13A Contextual Info: August 2004 ASM4SSTVF32852 rev 2.0 DDR 24-Bit to 48-Bit Registered Buffer Features To ensure that outputs are at a defined logic state before a stable clock has been supplied, RESETB must • Differential clock signals. be held at a logic “Low” level during power-up.	Original	asm4sstvf32852 24-bit 48-bit asm4sstvf16857 +3asm4sstvf16859 asm5cvf857 q13a	PDF
1H08S Abstract: PI6C2405A-1HW ASM706CUA SOIC-6 microchip ADM809RAR ADM705AN MAX809SEUR T ASM5P2309-1H-16-S K7N163601B MAX810JEUR Contextual Info: Supervisors Cross Reference Guide Alliance Maxim/Dallas IMP ASM1232LP DS1232LPS-2 IMP1232LP ASM1232LPCMA DS1232LP IMP1232LPCMA ASM1232LPEMA DS1232LP IMP1232LPEMA ASM1232LPN DS1232LP IMP1232LPN Analog Devices Micrel Microchip MIC1232N TC1232CPA - - - - - -	Original	asm1232lp ds1232lps-2 imp1232lp asm1232lpcma +15ds1232lp imp1232lpcma asm1232lpema imp1232lpema asm1232lpn 1h08s pi6c2405a-1hw asm706cua soic-6 microchip adm809rar adm705an max809seur t asm5p2309-1h-16-s k7n163601b max810jeur	PDF
ADM809RAR Abstract: AS7C256A hsbga 416 lcd cross reference IDT CYPRESS CROSS REFERENCE clocks DS1232* watch dog timer Product Selector Guide mbg* sot143 FS781 IDT74SSTV16857 Contextual Info: DISCLAIMER Alliance Semiconductor Corporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Alliance Semiconductor does not assume any responsibility for use of any circuitry described other than the circuitry embodied	Original	is61lv25616al is61lv5128al is61lv6416 is61c6416 +15is61lv1024 48-pin as9c25256m2036l as9c25512m2018l 512kx18 adm809rar as7c256a hsbga 416 lcd cross reference idt cypress cross reference clocks ds1232* watch dog timer product selector guide mbg* sot143 fs781 idt74sstv16857	PDF
ASM4SSTVF16857 Abstract: ASM4SSTVF16859 ASM4SSTVF32852 ASM5CVF857 Q13A Contextual Info: November 2003 ASM4SSTVF32852 rev 1.0 DDR 24-Bit to 48-Bit Registered Buffer Features To ensure that outputs are at a defined logic state • Differential clock signals. before a stable clock has been supplied, RESETB must • Supports SSTL_2 class II specifications on inputs	Original	asm4sstvf32852 24-bit 48-bit asm4sstvf16857 +3asm4sstvf16859 asm5cvf857 q13a	PDF
ASM4SSTVF16857 Abstract: 48TT ASM5CVF857 JC42 PC2100 PC2700 PC3200 marking AAAC Contextual Info: August 2004 ASM4SSTVF16857 rev 2.0 DDR 14-Bit Registered Buffer LVCMOS level at a valid logic state since VREF may Features • not be stable during power-up. Fully JEDEC JC40 - JC42.5 compliant for DDR1 applications to include: PC1600, PC2100, PC2700 To ensure that outputs are at a defined logic state	Original	asm4sstvf16857 14-bit pc1600 pc2100 +7pc2700 pc3200 200mhz 48tt asm5cvf857 jc42 marking aaac	PDF
48TT Abstract: PC2100 PC2700 PC3200 ASM4SSTVF16857 ASM4SSTVF16857-48TT ASM5CVF857 JC42 Contextual Info: ASM4SSTVF16857 November 2003 rev v1.0 DDR 14-Bit Registered Buffer Features • To ensure that outputs are at a defined logic state before a Fully JEDEC JC40 - JC42.5 compliant for DDR1 applica- stable clock has been supplied, RESETB must be held at a tions to include: PC1600, PC2100, PC2700 & PC3200.	Original	asm4sstvf16857 14-bit pc1600 pc2100 +6pc2700 pc3200 48tt asm4sstvf16857-48tt asm5cvf857 jc42	PDF
JC-42 Abstract: AAAC Contextual Info: June 2004 ASM4SSTVF16857 rev 1.1 DDR 14-Bit Registered Buffer LVCMOS level at a valid logic state since VREF may Features • not be stable during power-up. Fully JEDEC JC40 - JC42.5 compliant for DDR1 applications to include: PC1600, PC2100, PC2700 & PC3200.	Original	14-bit asm4sstvf16857 pc1600 pc2100 +4pc2700 pc3200 jc-42 aaac	PDF
ASM4SSTVF16859 Abstract: ASM5CVF857 JC42 PC2100 PC2700 PC3200 Q13A Contextual Info: ASM4SSTVF16859 November 2003 rev v1.0 DDR 13-Bit to 26-Bit Registered Buffer Features • LVCMOS level at a valid state since VREF may not be stable during power-up. Differential clock signals. • Meets SSTL_2 class II specifications on outputs. • Low voltage operation: VDD = 2.3V to 2.7V.	Original	asm4sstvf16859 13-bit 26-bit 64-pin +756-pin asm5cvf857 jc42 pc2100 pc2700 pc3200 q13a	PDF
ASM4SSTVF16859 Abstract: ASM5CVF857 JC42 PC2100 PC2700 PC3200 Q13A Contextual Info: August 2004 ASM4SSTVF16859 rev 2.0 DDR 13-Bit to 26-Bit Registered Buffer off. Note that RESETB should be supported with a Features LVCMOS level at a valid state since VREF may not be • Differential clock signals.  Meets SSTL_2 class II specifications on	Original	asm4sstvf16859 13-bit 26-bit 64-pin +756-pin asm5cvf857 jc42 pc2100 pc2700 pc3200 q13a	PDF