AND-OR-INVERT GATE Search Results

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D N14A
Contextual Info: 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate 3-3 AND-OR-INVERT function. General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a Ordering Code: Commercial Package Number

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D MS-001 N14A
Contextual Info: Revised July 1999 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function. Ordering Code: Order Number

74F51

Abstract: 74F51PC 74F51SC 74F51SJ M14A M14D MS-001 N14A
Contextual Info: Revised September 2000 74F51 Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate General Description This device contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function. Ordering Code:

DM74LS51

Abstract: 54LS51DMQB 54LS51FMQB 54LS51LMQB DM74LS51M DM74LS51N E20A J14A M14A 54LS51
Contextual Info: DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gates Each package contains one 2-wide 2-input and one 2-wide 3-input AND-OR-INVERT gates. General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function.

NTE7470

Abstract: NTE746 NTE7454 NTE74LS63 NTE74LS55 NTE7460 NTE74H53 NTE74H54 NTE74H55 NTE74H60
Contextual Info: INTEGRATED CIRCUITS - TTL TRANSISTOR TRANSISTOR LOGIC NTE74H53 14-Lead DIP, See Diag. 247 Expandable AND/OR Invert Gate NTE74H54 14-Lead DIP, See Diag. 247 4-W ide AND/OR Invert Gate NTE7454 14-Lead DI P, See Diag. 247 4-W ide AND/OR Invert Gate Q v cc A r i

DM74S51

Abstract: DM74 DM74S51N N14A
Contextual Info: DM74S51 Dual 2-Wide 2-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Connection Diagram Dual-In-Line Package DS006454-1 Order Number DM74S51N

DM74S51

Abstract: DM74S51N MS-001 N14A
Contextual Info: Revised April 2000 DM74S51 Dual 2-Wide 2-Input AND-OR-INVERT Gate General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Ordering Code: Order Number DM74S51N Package Number N14A

74F64

Abstract: N74F64D N74F64N
Contextual Info: INTEGRATED CIRCUITS 74F64 4-2-3-2-input AND-OR-invert gate Product specification IC15 Data Handbook Philips Semiconductors 1996 Mar 14 Philips Semiconductors Product specification 4-2-3-2-input AND-OR-invert gate TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT

DM54

Abstract: DM74
Contextual Info: DM54L55/ DM74L55 National Semiconductor DM54L55/DM74L55 2-Wide, 4 Input AND-OR-INVERT Gates General Description Absolute Maximum Ratings Note 1 This device con tains a com bination of gates w hich per­ form the logic AND-OR-INVERT function. Supply Voltage

Contextual Info: M M O TO R O LA Military 10H521 4-Wide “OR-AND/OR-AND-INVERT” Gate MP0 ELECTRICALLY TESTED PER: 5962-8773001 The 10H521 is a basic logic building block providing the simultaneous ORAND/OR-AND-INVERT function, used in data control and digital multiplexing

DM74LS51

Abstract: DM74LS51M DM74LS51N M14A MS-001 N14A
Contextual Info: Revised March 2000 DM74LS51 Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gate General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Each package contains one 2-wide 2-input and

DM54

Abstract: DM74
Contextual Info: DM54L54/DM74L54 National ÆjA Semiconductor DM54L54/DM74L54 4-Wide AND-OR-INVERT Gates General Description Absolute Maximum Ratings Note d This device con tains a com bination of gates w hich per­ form s the logic AND-OR-INVERT function. Supply V oltage

400S

Abstract: DM54 DM74 DM7454
Contextual Info: DM5454/DM7454 National äLA Semiconductor DM5454/DM7454 4-Wide 2-Input AND-OR-INVERT Gates General Description Absolute Maximum Ratings Note 1 This device con tains a com binatio n of gates w hich perform s the logic AND-OR-INVERT fun ction. Supply V oltage

Contextual Info: M M O T O R O L A Military 10521 4-Wide “OR-AND/OR-AND-INVERT” Gate ELECTRICALLY TESTED PER: 5962-8857701 M The 10521 is a basic building block providing the simultaneous OR-AND/ORAND-INVERT function, useful in data control and digital multiplexing applica­

54F64DM

Abstract: 54F64FM 54F64LM 74F64 74F64PC 74F64SC J14A M14A N14A W14B
Contextual Info: 54F 74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function Commercial Package Number Military 74F64PC Package Description N14A 14-Lead 0 300 Wide Molded Dual-In-Line

Contextual Info: DM54S65/ DM74S65 National Semiconductor DM54S65/DM74S65 4-Wide AND-OR-INVERT Gates with Open-Collector Outputs General Description Absolute Maximum Ratings Note d This device contains a combination of gates which per­ forms the logic AND-OR-INVERT function. The opencollector output requires an external pull-up resistor for

Contextual Info: LS TTL DN74LS Series DN74LS55 DN74LS55 bN 74IS 55 2 - wide 4 - input AND-OR-INVERT Gates • Description P-1 DN74LS55 contains two 4-input AND-OR-INVERT gates. ■ Features • • • • Low pow er consum ption Pa = 2.75mW typical High speed ( t pd = 12ns typical)

74LS48

Abstract: 74ls48 PIN OUT decoder 74LS48 TTL 74LS48 74ls48 datasheet 74LS48D LS48 lamptest 561 7 SEGMENT
Contextual Info: SN54/74LS48 BCD TO 7-SEGMENT DECODER The SN54 / 74LS48 is a BCD to 7-Segment Decoder consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. Seven NAND gates and one driver are connected in pairs to make BCD data and its complement available to the seven decoding AND-OR-INVERT gates. The remaining

74HCT51

Abstract: GD74HCT51
Contextual Info: GD54/74HC51, GD54/74HCT51 DUAL AND-OR-INVERT GATES General Description These devices are identical in pinout to the 5 4/74L S 51 . They contain one 2-wide 2-input & one 2-wide 3-input AND-OR-INVERT gates. These devices are characterized for operation over wide

Contextual Info: S G S - THOMSON MEE D 7151337 003320b ? SGS-THOMSON l-.S-e.TH- - r - t / s - r s T74LS54 ¡no 3-2-2-3-INPUT AND-OR-INVERT GATE DESCRIPTION The T74LS54 is a high speed 3-2-2-3-INPUT AND-OR-INVERT GATE fabricated in LOW POWER SCHOTTKY technology. SCHEMATIC B1

Contextual Info: S E M IC O N D U C T O R tm DM74S51 Dual 2-Wide 2-Input AND-OR-INVERT Gates General Description This device contains two independent combinations of gates each of which performs the logic AND-OR-INVERT function. Connection Diagram Dual-ln-Line Package MAKF NO EXTERNAL

74F64

Abstract: 4-2-3-2-input AND-OR-invert gate 74F64PC 74F64SC 74F64SJ M14A M14D MS-001 N14A
Contextual Info: Revised September 2000 74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function. Ordering Code: Order Number Package Number Package Description 74F64SC M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, 0.150 Narrow

Contextual Info: GD54/74LS55 2WIDE 4-INPUT AND-OR-INVERT GATES Description This device contains a combination of gates each of which performs the logic AND-OR-INVERT function. Pin Configuration Vcc H G F E NC Y Y =A BC D+EFG H Function Table Inputs Output A B C D E F G H Y

Contextual Info: ss DUAL 2-WIDE 2-INPUT / 3-INPUT AND-OR- INVERT GATE DESCRIPTION The T54LS51/T74LS51 is a high speed DUAL 2-WIDE 2-INPUT / 3-INPUT AND-OR INVERT GA­ TE fabricated in LOW POWER SCHOTTKY tech­ nology. I 1 1 B1 D1/D2 Plastic Package Ceramic Package s M1 / C1