| AN-1041
Abstract: AN-1059 AN-1084 AN-1109 AN-905 AN1109 AN100883-2 
Contextual Info: CHANNEL-LINK OPERATION The Channel-Link chipset is configured to provide high speed data transmission over a reduced size interconnect. With the 7 to 1 mux/demux architecture cable and connector reductions of up to 80% are possible. LVDS also provides a low noise system due to the use of current mode LVDS line
 | Original
 | an100883
AN-1041
AN-1059
AN-1084
AN-1109
AN-905
AN1109
AN100883-2 | PDF | 
| AN-1041
Abstract: AN-1059 AN-1084 AN-1109 AN-905 AN100883 
Contextual Info: National Semiconductor Application Note 1109 John Goldie Michael Hinh May 1998 CHANNEL-LINK OPERATION The Channel-Link chipset is configured to provide high speed data transmission over a reduced size interconnect. With the 7 to 1 mux/demux architecture cable and connector
 | Original
 | load959 
AN-1041
AN-1059
AN-1084
AN-1109
AN-905
AN100883 | PDF | 
| AN-1041
Abstract: AN-905 AN-1059 AN-1084 AN-1109 
Contextual Info: National Semiconductor Application Note 1109 John Goldie Michael Hinh May 1998 CHANNEL-LINK OPERATION The Channel-Link chipset is configured to provide high speed data transmission over a reduced size interconnect. With the 7 to 1 mux/demux architecture cable and connector
 | Original
 | AN-1109 
AN-1041
AN-905
AN-1059
AN-1084
AN-1109 | PDF |