ALVCH373 Search Results

A115-A

Abstract: C101 SN74ALVCH373 SN74ALVCH373DW 74ALVCH373
Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

Contextual Info: ALVCH373 OCTAL TRANSPARENT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS SCES116G − JULY 1997 − REVISED AUGUST 2003 D D D D D D DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the

IDT74ALVCH373

Abstract: DSC 5D
Contextual Info: ALVCH373 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – – ALVCH373 ADVANCE INFORMATION

74LVC05

Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
Contextual Info: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed

A115-A

Abstract: C101 SN74ALVCH373 SN74ALVCH373DW
Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCES116F – JULY 1997 – REVISED NOVEMBER 2002 D D D D D D DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the

Contextual Info: ALVCH373 OCTAL TRANSPARENT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS SCES116G − JULY 1997 − REVISED AUGUST 2003 D D D D D D DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the

Contextual Info: 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD D E S C R IP TIO N : FE A T U R E S : - 0.5 MICRON CM OS Technology Typical tSK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

VB373

Abstract: A115-A C101 SN74ALVCH373 SN74ALVCH373DW
Contextual Info: ALVCH373 OCTAL TRANSPARENT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS SCES116G − JULY 1997 − REVISED AUGUST 2003 D D D D D D DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V Bus Hold on Data Inputs Eliminates the

IDT74ALVCH373

Abstract: DSC 5D
Contextual Info: ALVCH373 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – ALVCH373 0.5 MICRON CMOS Technology

dsc 5d

Contextual Info: ALVCH373 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – ALVCH373 ADVANCE INFORMATION 0.5 MICRON CMOS Technology

74ALVCH373

Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

74ALVCH373

Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

74ALVCH373

Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

Contextual Info: 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology Typical tS K o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 1,27mm pitch SOIC, 0.65mm pitch SSOP,

A115-A

Abstract: C101 SN74ALVCH373 SN74ALVCH373DW 74ALVCH373
Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

74ALVCH373

Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

Contextual Info: 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - DESCRIPTION: 0.5 MICRON CMOS Technology Typical tSK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 1.27mm pitch SOIC, 0.65mm pitch SSOP,

A115-A

Abstract: C101 SN74ALVCH373 SN74ALVCH373DW
Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

74ALVCH373

Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

74ALVCH373

Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

IDT74ALVCH373

Contextual Info: ALVCH373 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH373 DESCRIPTION: FEATURES: This octal transparent D-type latch is built using advanced dual metal

74ALVCH373

Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V

74alvch373

Abstract: A115-A C101 SN74ALVCH373 SN74ALVCH373DW
Contextual Info: ALVCH373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCES116H – JULY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • DGV, DW, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 3.3 ns at 3.3 V ±24-mA Output Drive at 3.3 V