ALVCH32373 Search Results

Contextual Info: 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: - ALVCH32373 ADVANCE INFORMATION 0.5 M ICRO N C M O S Technology Typical tsK o (Output Skew) < 250ps ESD > 2000V per M IL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

Contextual Info: ALVCH32373 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH32373 DESCRIPTION: FEATURES: The 32-bit transparent D-type latch is built using advanced dual metal

Contextual Info: ALVCH32373 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH32373 DESCRIPTION: FEATURES: The 32-bit transparent D-type latch is built using advanced dual metal

32-bit D-type registers

Abstract: IDT74ALVCH32373
Contextual Info: ALVCH32373 3.3V CMOS 32-BIT BUS TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – – ALVCH32373 ADVANCE

4D2 diode

Contextual Info: ALVCH32373 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH32373 FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK o (Output Skew) < 250ps

Contextual Info: life Integrated D e v ic e T ech n o lo gy, i i c . 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: - ALVCH32373 ADVANCE INFORMATION 0.5 MICRON CMOS Technology Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015;

Contextual Info: 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD D E S C R IP TIO N : FE A T U R E S : - 0.5 MICRON CMOS Technology Typical tSK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

IDT74ALVCH32373

Abstract: e53-q
Contextual Info: ALVCH32373 3.3V CMOS 32-BIT BUS TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 32-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – – ALVCH32373 0.5 MICRON CMOS Technology