ALVCH16863 Search Results

Contextual Info: ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: This 18-bit transceiver is built using advanced dual metal CMOS technology. The ALVCH16863 is a noninverting transceiver designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements.

IDT74ALVCH16863

Contextual Info: ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: This 18-bit transceiver is built using advanced dual metal CMOS technology. The ALVCH16863 is a noninverting transceiver designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements.

IDT74ALVCH16863

Abstract: xbxx
Contextual Info: ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: This 18-bit transceiver is built using advanced dual metal CMOS technology. The ALVCH16863 is a noninverting transceiver designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements.

Contextual Info: 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD FE A T U R E S : - 0.5 MICRON CMOS Technology - Typical - tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) - 0.635mm pitch S SO P , 0.50mm pitch T SSO P,

74LVC05

Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
Contextual Info: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed

Contextual Info: 3.3 V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH16863 DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

Contextual Info: 3.3 V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.635mm pitch SSOP, 0.50mm pitch TSSOP,

IDT74ALVCH16863

Abstract: SO56-2
Contextual Info: ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – – ALVCH16863 0.5 MICRON CMOS Technology