ALVCH16 Search Results

Contextual Info: 3.3V CMOS 20-BIT BUSINTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH162841 ADVANCE INFORMATION particularly suitable for implementing buffer registers, unidi­ rectional bus drivers, and working registers. The ALVCH162841 can be used as two 10-bit latches or

74ALVCH16244

Abstract: 74ALVCH16244T ALVCH16244 MTD48
Contextual Info: Revised September 2001 ALVCH16244 Low Voltage 16-Bit Buffer/Line Driver with Bushold General Description Features The ALVCH16244 contains sixteen non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/

ZP500A

Contextual Info: 3.3V CMOS 16-BIT BUFFER/LINE DRIVER ALVCH16244 ALVCH162244 IDT74ALVC16244 ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: The ALVCH16x244/ALVCH16244 16-bit buffer line driver are built using advanced dual metal CMOS technology. These

Contextual Info: 3.3V CMOS 16-BIT REGISTER ALVCH16374 ALVCH162374 IDT74ALVC16374 ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: The ALVCH16374 16-bit edge-triggered D-type registers are built using advanced dual metal CMOS technology. These high-speed, low-power registers are ideal for use as buffer

Contextual Info: ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: This 18-bit transceiver is built using advanced dual metal CMOS technology. The ALVCH16863 is a noninverting transceiver designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements.

Contextual Info: 3.3V CMOS 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - CMOS technology. The ALVCH162821 device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20-bit flipflops are edge-triggered D-type flip-flops. On the positive

ALVCH162835

Abstract: ALVCH162835T ALVCH162835V ALVCH162835Y
Contextual Info: ALVCH162835 Registered 18-Bit Bus Driver Preliminary Product Features Product Description Cont. • • • To ensure the high-impedance state during power up or power down, OE should be tied to VDD through a pullup resistor; the minimum value of the resistor is

ALVCH16244T

Abstract: ALVCH16244 ALVCH16244V ALVCH16244Y
Contextual Info: ALVCH16244 16 Bit Buffer/Driver with 3-State Outputs Preliminary Product Features Product Description Cont. • 16 bit buffer with nibble output enable control • Output buffers have controlled edge rates. • Bus Hold on data inputs eliminates need for

74ALVCH16240

Abstract: 74ALVCH16240MTD MTD48
Contextual Info: Revised September 2001 ALVCH16240 Low Voltage 16-Bit Inverting Buffer/Line Driver with Bushold General Description The ALVCH16240 contains sixteen inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/

74ALVCH162244

Abstract: ALVCH162244 MTD48
Contextual Info: Revised September 2001 ALVCH162244 Low Voltage 16-Bit Buffer/Line Driver with Bushold and 26Ω Series Resistor in Outputs General Description Features The ALVCH162244 contains sixteen non-inverting buffers with 3-STATE outputs to be employed as a memory and

SO56-2

Abstract: IDT74ALVCH16721
Contextual Info: ALVCH16721 3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 20-BIT FLIPFLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: ALVCH16721 DESCRIPTION: This 20-bit flip-flop is built using advanced dual metal CMOS technology. The 20 flip-flops of the ALVCH16721 are edge-triggered D-type flipflops with qualified clock storage. On the positive transition of the clock

ALVCH162244

Contextual Info: ALVCH162244 16 Bit Buffer/Driver with 3-State Outputs Preliminary Product Features Product Description Cont. • 16 bit buffer with nibble output enable control • Bus hold on data inputs eliminates the need for external pullup/pulldown resistors. • Output drivers have controlled edge rates, so no

Contextual Info: 3.3 V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - ALVCH16823 ticularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working reg­ isters. The ALVCH16823 can be used as two 9-bit flip-flops or

IDT74ALVCH16863

Contextual Info: ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE ALVCH16863 3.3V CMOS 18-BIT TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: This 18-bit transceiver is built using advanced dual metal CMOS technology. The ALVCH16863 is a noninverting transceiver designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements.

74ALVCH16374

Abstract: 74ALVCH16374T MTD48
Contextual Info: Revised February 2002 ALVCH16374 Low Voltage 16-Bit D-Type Flip-Flop with Bushold General Description Features The ALVCH16374 contains sixteen non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock CP and output enable (OE) are common to

Contextual Info: 3.3V CMOS 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: - This high speed, 20-bit bus-interface flip-flop is built us­ ing advanced CMOS technology. The ALVCH16821 device can be used as two 10-bit flip-flops or one 20-bit flip-flop. On

Contextual Info: 3.3V CMOS 20-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - CMOS technology. The ALVCH162821 device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20-bit flipflops are edge-triggered D-type flip-flops. On the positive

Contextual Info: 3.3 V CMOS 10-BIT FLIP-FLOP WITH DUAL OUTPUTS, 3-STATE OUTPUTS AND BUS-HOLD ALVCH162820 DESCRIPTION: FEATURES: This 10-bit flip-flop is built using advanced dual metal CMOS technology. The ALVCH162820 is an edge-triggered D-type flip-flop. On the positive transition of the clock CLK

Contextual Info: 3.3V CMOS 20-BIT BUSINTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - tive relatively low-impedance loads. This device is particu­ larly suitable for implementing buffer registers, unidirectional bus drivers, and working registers. The ALVCH16841 can be used as two 10-bit latches or

Contextual Info: 3.3V CMOS 20-BIT BUFFER/LINE DRIVER ALVCH16827 ALVCH162827 ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: The ALVCH16x827 20-bit buffers are built using advanced dual metal CMOS technology. These 20-bit bus drivers pro­ vide high-performance bus interface buffering for wide data/

Contextual Info: 3.3V CMOS ADDRESS BUFFER ALVCH16344 ALVCH162344 ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: The ALVCH16344 is a 1:4 address line driver built using advanced dual metal CMOS technology. This high-speed, lowpower device provides the ability to fanout to memory arrays.

Contextual Info: 3.3 V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS AND BUS-HOLD DESCRIPTION: FEATURES: - This 16-bit buffer/driver is built using advanced dual metal CMOS technology. The ALVCH16240 is deigned specifically to improve the performance and density of 3-state memory

ALVCH162835

Contextual Info: ALVCH162835 Registered 18-Bit Bus Driver Preliminary Product Features Product Description Cont. • • • To ensure the high-impedance state during power up or power down, OE should be tied to VDD through a pullup resistor; the minimum value of the resistor is

ALVCH16244

Contextual Info: ALVCH16244 16 Bit Buffer/Driver with 3-State Outputs Preliminary Product Features Product Description Cont. • 16 bit buffer with nibble output enable control • Output buffers have controlled edge rates. • Bus Hold on data inputs eliminates need for