ALTL Search Results

Contextual Info: .’ r -, ! * . . RESEARCH, iNC. ‘I’ES’l KEl?UK’l’ FY bL Y un CURRENT CARRYING CAPACITY -2 SMM/TMM SAMTEC CORPORATION 67 MECHANIC STREET AlTlEBORO, MASSACHUSETI’S 02703. .-. . I- - . - - - m -n . ?I SCOPE To perform current carrying capacity testing on Connectors

Contextual Info: CONTECH RESEARCH, INCm JANUARY 29,1993 TEST REPORT #93003A QUALIFICATION TESTING CES-150-01-T-S MATERIAL: PHOS BRONZE SAMTEC CORPORATION 67 MECHANIC STREET AlTLEBORO, MASSACHUSETTS 02703 508/226-4800 _ ~, * -.-. - : : _ <. : I . : . ., : ._,_ ‘. -. ;. ;

long range transmitter receiver circuit diagram

Abstract: receiver LVDS_rx UG-MF9504-7 receiver altLVDS long range transmitter receiver circuit vhdl code for clock and data recovery Deserialization receiver LVDS rx data path interface in vhdl SERDES
Contextual Info: LVDS SERDES Transmitter/Receiver ALTLVDS_RX/TX Megafunction User Guide UG-MF9504-7.0 August 2010 This user guide describes the features and behavior of the LVDS deserializer receiver (ALTLVDS_RX) and the LVDS serializer transmitter (ALTVDS_TX) megafunctions

501 PHOTO

Abstract: Aurora Gx5.3 GU10 aurora gu10
Contextual Info: 3-ALTLED Quotation Regional Distributor INDOOR Category Model Name 1~100 101~500 501~5000 $ $ $ 14.07 13.67 13.28 $ 28 1 V1 Aurora - MR16 GX5.3 - 5W (M01) (180°) (TW/NW/WW/R/G/B) Aurora - MR16 GX5.3 - 7W (M02) (180°) (TW/NW/WW/R/G/B) 1~100 101~500 501~5000

Contextual Info: Verzeichnis der verwendeten Symbole Index of Symbols ^ 2 5 /1 0 0 ß -W ert ^ 25/100 B value 1 B e trieb sstro m / O p e ra tin g c u rre n t N en nstro m T = TN Rated c u rre n t (T = TN) K altleiterstrom 1PTC PTC cu rre n t N e n n w id e rsta n d (T = TN)

PLL in RTL

Abstract: atom compiles
Contextual Info: Design Example Using the altlvds Megafunction & the External PLL Option in Stratix II Devices Application Note 409 March 2006, ver. 1.0 Introduction The altlvds megafunction allows you to instantiate an external phase-locked loop PLL when using Stratix II, HardCopy® II, or

ep4cgx30f484

Abstract: EP4CE115 CYIV-5V1-1 EP4CGX EP4CE55 EP4CE15 sigma delta lcd screen lvds 40 pin diagram ep4ce22 ep4ce40
Contextual Info: Cyclone IV Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com CYIV-5V1-1.5 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other

Contextual Info: TLV320DAC3101 www.ti.com SLAS666 – JANUARY 2010 Low-Power Stereo Audio DAC With Audio Processing and Stereo Class-D Speaker Amplifier Check for Samples: TLV320DAC3101 1 INTRODUCTION 1.1 Features • Stereo Audio DAC With 95-dB SNR • Supports 8-kHz to 192-kHz Sample Rates

Contextual Info: TLV320DAC3101 www.ti.com SLAS666 – JANUARY 2010 Low-Power Stereo Audio DAC With Audio Processing and Stereo Class-D Speaker Amplifier Check for Samples: TLV320DAC3101 1 INTRODUCTION 1.1 Features • Stereo Audio DAC With 95-dB SNR • Supports 8-kHz to 192-kHz Sample Rates

Contextual Info: TLV320AIC3100 www.ti.com SLAS667 – NOVEMBER 2009 Low-Power Audio Codec With Audio Processing and Mono Class-D Amplifier Check for Samples: TLV320AIC3100 1 INTRODUCTION 1.1 Features • Stereo Audio DAC With 95-dB SNR • Mono Audio ADC With 91-dB SNR • Supports 8-kHz to 192-kHz Separate DAC and

Contextual Info: TLV320DAC3120 www.ti.com SLAS659 – NOVEMBER 2009 Low-Power Mono Audio DAC With Embedded miniDSP and Mono Class-D Speaker Amplifier Check for Samples: TLV320DAC3120 1 INTRODUCTION 1.1 • • • • 1 • • • • • • • • • • • • Features

10K70

Contextual Info: TSC2117 Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller www.ti.com SLAS550A – APRIL 2009 – REVISED JUNE 2009 1 INTRODUCTION 1.1 Features • • • • • • • • • •

Contextual Info: y , I C S Integrated Circuit Systems, Inc. 1 5 6 2 A User Programmable Differential Output Graphics Clock Generator Description Features The ICS1562A is a very high performance monolithic phaselocked loop PLL frequency synthesizer. Utilizing ICS’s ad­

Contextual Info: ICS1572 T jD Integrated =L2=J Circuit Systems, Inc. User Programmable Differential Output Graphics Clock Generator Description Features The ICS1572 is a high perform ance monolithic phaselocked loop PLL frequency synthesizer. Utilizing ICS’ advanced CM OS mixed-mode technology, the ICS1572

block diagram for spy ear

Abstract: m30c design of spy ear spy ear datasheet COP87L84BC COP87L88EB COP87L88RB COP87L89EB COP87L89RB COP888EB
Contextual Info: Semiconductor ß COP87L88EB/RB Family 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory, CAN Interface, 8-Bit A/D, and USART General Description The C O P 87L88EB/R B Fam ily OTP (One Tim e program ­ mable m icrocontrollers are highly integrated COP8 Fea­

Contextual Info: TSC2117 www.ti.com SLAS550B – APRIL 2009 – REVISED JUNE 2012 Low-Power Audio Codec with Embedded miniDSP, Stereo Class-D Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller Check for Samples: TSC2117 1 INTRODUCTION 1.1 Features • Low-Power 13-mW Stereo 48-kHz Playback

COP688EB

Abstract: COP689EB COP888BC COP888EB COP889EB
Contextual Info: COP888EB 8-Bit CMOS ROM Based Microcontrollers with 8k Memory, CAN Interface, 8-Bit A/D, and USART General Description The COP888EB ROM based microcontrollers are highly integrated COP8 Feature core devices with 8k memory and advanced features including a CAN 2.0B passive interface,

Diode LT 228d

Abstract: 1E2H SMD making code DV5
Contextual Info: 7: 43 AM PM4323 OCTLIU LT Device ASSP Telecom Standard Product Data Sheet Released ,0 ay co n Th ur sd OCTLIU LT 1M ay ,2 00 8 01 :0 PM4323 of Pa rtm in er In Device Telecom Standard Product Proprietary and Confidential Released Issue No. 5: April 2008 Do

COP87L84BC

Abstract: COP87L88EB COP87L88RB COP87L89EB COP87L89RB COP888EB
Contextual Info: COP87L88EB/RB Family 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory, CAN Interface, 8-Bit A/D, and USART General Description The COP87L88EB/RB Family OTP One Time programmable microcontrollers are highly integrated COP8 Feature core devices with 16k or 32k memory and advanced

BROOKTREE ramdac

Abstract: ICS1562B 1562B ICS1562BM-001 ICS1562BM-201
Contextual Info: ICS1562B Integrated Circuit Systems, Inc. User Programmable Differential Output Graphics Clock Generator Description Features The ICS1562B is a very high performance monolithic phaselocked loop PLL frequency synthesizer. Utilizing ICS’s advanced CMOS mixed-mode technology, the ICS1562B

Contextual Info: CIRRUS LOGIC FEATURES Data Sheet Four-Channel, Multi-Protocol Communications Controller GeneraI • Four full-duplex channels ■ All channels support async, bisync, HDLC/ SDLC, and X.21 programmable sync protocols ■ Bit rates to 64 kbit transmit and receive NRZ,

Contextual Info: PM4354 COMET-QUAD RELEASED APPLICATION NOTE PMC-2000151 ISSUE 1 COMET-QUAD PROGRAMMING GUIDE PM4354 COMET-QUAD FOUR CHANNEL COMBINED E1/T1 TRANSCEIVER/FRAMER PROGRAMMING GUIDE RELEASED ISSUE 1: MAY 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

PMT16C

Abstract: ED02AH nte228
Contextual Info: PM6344 EQUAD STANDARD PRODUCT ISSUE 6 QUADRUPLE E1 FRAMER :0 4: 01 PM PMC-951013 ne sd ay, 14 De EQUAD ce m be r, 20 05 08 PM6344 ISSUE 6: DECEMBER 2005 Do wn lo ad ed by Co nt e nt Te a m of P ar tm in er In co n W ed QUADRUPLE E1 FRAMER PMC-Sierra, Inc.

VOLTAGE DEPENDENT RESISTOR panasonic

Contextual Info: :2 5: 39 PM Octal Short-Haul E1/T1/J1 Line Interface Device Telecom Standard Product Data Sheet Released nd ay ,1 6S ep te OCTLIU-SH m be r, 20 07 10 PM4319 Data Sheet Proprietary and Confidential Released Issue No. 3: May 2002 Do wn l oa de d by I HS Pa r