ALOOP Search Results

COD0419X

Contextual Info: COD0419X 0.25µ µm SIGMA-DELTA VOICE CODEC GENERAL DESCRIPTION The COD0419X is Sigma-Delta CODEC for speech and telephony applications. The product contains both digital IIR/FIR filter and smoothing filter. The normal input and output channels have µ/A law format with 38dB signal to

nec 765 fdc

Abstract: W83877ATF W83877AF W83877F PC97 RECS-80 APM 2510 irsl200 NEC marking 8215 date code
Contextual Info: W83877ATF WINBOND I/O W83877ATF Data Sheet Revision History Pages Dates Version 1 n.a. 07/29/97 0.50 2 1,3,6,49,50,98,140, 141,142,170 04/10/98 0.51 Version on Web Main Contents First published. A1 Typo correction and data calibrated 3 4 5 6 7 8 9 10 Please note that all data and specifications are subject to change without notice. All

AM 770 DENSITY TRANSMITTER

Abstract: T12xx 8829C
Contextual Info: DEVICE SPECIFICATION SO N E T /SD H /AT M OC-12 T R AN SM ITTER AND RECEIVER FEATURES • Complies with ANSI, Bellcore, and ITU-T specifications • On-chip high-frequency PLL for clock generation and clock recovery • Supports 622.08 Mbit/s OC-12/STM-4

variable dutycycle square wave generator circuit

Abstract: IR dual full bridge DRIVER IC PWM MOTOR CONTROL 5V bipolar STEPPER MOTOR schematic diagram motor control Bipolar IC For Switching Power Supply Contro L6258 984-nn
Contextual Info: L6258 PWM C O NTRO LLED - HIGH CUR RENT DMOS UNIVERSAL MOTOR DRIVER P R O D U C T P R E V IE W • ABLE TO DRIVE BOTH WINDINGS OF A BI­ POLAR STEPPER MOTOR OR TWO DC MO­ TORS ■ OUTPUT CURRENT UP TO 1.5A EACH WINDING ■ WIDE VOLTAGE RANGE: 10V TO 45V ■ FOUR QUADRANT CURRENT CONTROL,

A23 1101 01A

Abstract: E1-PCM-30 Bt8370KPF RJ48C EE - 19c TRANSFORMER E1-PCM-30 ch chips 65554 RDL2 MC68302 TR-303
Contextual Info: Bt8370/75/76 Fully Integrated T1/E1 Framer and Line Interface The Bt8370/75/76 is a family of single-chip transceivers for T1/E1 and Integrated Distinguishing Features Service Digital Network ISDN primary rate interfaces, operating at 1.544 Mbps or 2.048 Mbps. These devices combine a sophisticated framer, transmit and receive slip ! Single-chip T1/E1 framer with short/long

DSPHEX

Abstract: TMS32025 TMS32050 addressing modes with examples SPRU011 SPRU014 SPRU018D SPRU052 TMS320 Tektronix asg 100 SPRU013
Contextual Info: TMS320C1x/C2x/C2xx/C5x Assembly Language Tools User’s Guide 1995 Microprocessor Development Systems Printed in U.S.A., March 1995 SDS SPRU018D TMS320C1x/C2x/C2xx/C5x Assembly Language Tools 1995 User’s Guide TMS320C1x/C2x/C2xx/C5x Assembly Language Tools

Midcom CR 0090

Contextual Info: D A TA S H E E T JUNE 1999 LXT359 Revision 2.1 Integrated T1 LH /SH Transceiver for D S1/DSX-1/CSU o r NTU /ISD N P R I Applications General Description Features The LXT359 is a T1 Primary rate, combination transceiver for T1 long and short-haul applications. It operates over 22

KA3120

Abstract: 12v DC MOTOR SPEED CONtrol ic Hdd spindle motor back-emf HDD spindle motor circuit HDD circuit schematic
Contextual Info: PRELIMINARY HDD PRODUCTS KA3120 SPINDLE & VOICE COIL MOTOR ONE CHIP DRIVER 48-QFPH-1414 The KA3120 is an ASIC combination chip, which was designed for the HDD, includes the following functions: spindle motor drive, voice coil motor drive, retract and power management.

schematic diagram motor control dc 12v

Abstract: L6258E POWERSO36 kt 825 equivalent
Contextual Info: L6258E PWM CONTROLLED - HIGH CURRENT DMOS UNIVERSAL MOTOR DRIVER • ■ ■ ■ ■ ■ ■ ■ ■ ABLE TO DRIVE BOTH WINDINGS OF A BIPOLAR STEPPER MOTOR OR TWO DC MOTORS OUTPUT CURRENT UP TO 1.2A EACH WINDING WIDE VOLTAGE RANGE: 12V TO 40V FOUR QUADRANT CURRENT CONTROL,

em 329

Abstract: XC68F333CFT16 M68000 MC68F333 YFF700 YFF702 YFF706 YFF710 UPC 494 Application Note upc uninterrupted power supply circuit diagram
Contextual Info: MC68F333 USER’S MANUAL Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and

atm with an eye block diagram

Contextual Info: XRT91L31 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER FEBRUARY 2008 REV. 1.0.1 GENERAL DESCRIPTION The XRT91L31 is a fully integrated SONET/SDH transceiver for SONET/SDH 622.08 Mbps STS-12/ STM-4 or 155.52 Mbps STS-3/STM-1 applications. The transceiver includes an on-chip Clock Multiplier

Contextual Info: XRT83L30 SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JUNE 2004 REV. 1.0.0 GENERAL DESCRIPTION The XRT83L30 is a fully integrated single-channel long-haul and short-haul line interface unit for T1 1.544Mbps 100Ω, E1(2.048Mbps) 75Ω or 120Ω

Intel 8081

Contextual Info: áç XRT82L34 PRELIMINARY QUAD T1/E1/J1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR DECEMBER 2000 REV. P1.0.5 GENERAL DESCRIPTION The XRT82L34 is a fully integrated Quad four channels short-haul line interface unit for T1(1.544Mbps) 100Ω and E1(2.048Mbps) 75Ω or 120Ω applications.

Contextual Info: xr XRT91L30 PRELIMINARY STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER SEPTEMBER 2006 REV. P2.0.0 GENERAL DESCRIPTION The XRT91L30 is a fully integrated SONET/SDH transceiver for SONET/SDH 622.08 Mbps STS-12/ STM-4 or 155.52 Mbps STS-3/STM-1 applications.

83977ATF

Abstract: winbond msl 83977TF marking rld bh sot 223 st ae gp 446
Contextual Info: W83977ATF WINBOND I/O W83977ATF Data Sheet Revision History Pages Dates Version Version Main Contents on Web 1 n.a. 08/25/97 0.50 First published. 2 53,54,58,63,64,65, 69,138.1,139 11/17/97 0.51 Register correction 3 1,2,3,20,45,53,63, 65,99,103,150 04/01/98

motorola e1000

Abstract: transistor manual substitution FREE DOWNLOAD 8a21 gal programming timing chart Model CG 100 A STRIP TEMPLATE SC transistor manual substitution transistor substitution chart Transistor Substitution Data Book 1993 TMS320C80
Contextual Info: TMS320C80 MVP Code Generation Tools User’s Guide 1995 Microprocessor Development Systems Printed in U.S.A., March 1995 SDS SPRU108A TMS320C80 (MVP) Code Generation Tools 1995 User’s Guide TMS320C80 (MVP) Code Generation Tools User’s Guide Printed on Recycled Paper

Contextual Info: DATA S H E E T JULY 1999 Revision 1.1 LXT384 Octal T1/E1 Transceiver General Description The LXT384 is an octal short haul Pulse Code Modulation PCM transceiver for use in both 1.544 Mbps (Tl) and 2.048 Mbps (El) applications. It incorporates eight independent receivers and eight independent transmitters

220-1pseudo-random

Abstract: NC11 NC12 XRT83L38 XRT83L38IB XRT83L38IV microprocessor users manual
Contextual Info: XRT83L38 OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JUNE 2004 REV. 1.0.0 GENERAL DESCRIPTION The XRT83L38 is a fully integrated Octal eight channel long-haul and short-haul line interface unit for T1 (1.544Mbps) 100Ω, E1 (2.048Mbps) 75Ω or

j1850 application schematic

Abstract: sae j1850 pwm sae j1850 pwm controller 68HC908AS20 Protocol j1850 vpw polynomial calculation J1850 CRC calculation mdlc HC05 HC08
Contextual Info: Order this document by AN1731/D Motorola Semiconductor Application Note AN1731 VPW J1850 Multiplexing and MotorolaÕs Byte Data Link Controller BDLC Module By Kim Sparks Systems Engineering Austin, Texas Introduction This application note primarily is intended to teach people about variable

LA 76810 OR EQUALANT

Abstract: LA 76810 transistor manual substitution FREE DOWNLOAD transistor manual substitution ALL TYPE IC DATA AND manual substitution BOOK CC 1215 74416 TMS320C549 MCS 4040 LA 76810 b
Contextual Info: TMS320C54x Assembly Language Tools User’s Guide Literature Number: SPRU102D December 1999 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

68HC11

Abstract: NC11 NC12 XRT83L38 XRT83L38IB B8ZS* encoding
Contextual Info: XRT83L38 OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JUNE 2007 REV. 1.0.2 GENERAL DESCRIPTION The XRT83L38 is a fully integrated Octal eight channel long-haul and short-haul line interface unit for T1 (1.544Mbps) 100Ω, E1 (2.048Mbps) 75Ω or

dmo 365 r

Abstract: B4S2 XRT83L30 XRT83L30IV 75E11
Contextual Info: XRT83L30 SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JUNE 2006 REV. 1.0.1 GENERAL DESCRIPTION The XRT83L30 is a fully integrated single-channel long-haul and short-haul line interface unit for T1 1.544Mbps 100Ω, E1(2.048Mbps) 75Ω or 120Ω

16Cxx

Abstract: p16c FP24.A16 P16CR84 75419 AN575 IEEE754 PIC16 PIC17 GA 88
Contextual Info: M AN575 IEEE 754 Compliant Floating Point Routines Author: Frank J. Testa FJT Consulting INTRODUCTION This application note presents an implementation of the following floating point math routines for the PICmicro microcontroller families: • • • •

TG29-1205NX

Abstract: smcj5.0ac LXT331 PM4344 PM6344
Contextual Info: Intel LXT331 Dual Transceivers with PMC PM4344/6344 Quad Framers Application Note January 2001 Order Number: 249166-001 As of January 15, 2001, this document replaces the Level One document known as AN058. Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual