AES 128 ALGORITHM Search Results

actel A3P250

Abstract: key expansion for aes algorithm
Contextual Info: Helion Technology OVERVIEW DATASHEET – High Performance AES Rijndael cores for Actel FPGA Features • Implements AES (Rijndael) to plaintext in ciphertext out 128-bits 128-bits • • key in 128/192/256-bits • • key-size select Helion AES Encryption Core

key expansion for aes algorithm

Contextual Info: Helion Technology OVERVIEW DATASHEET – Ultra-Low Resource AES Rijndael cores for Actel FPGA plaintext in ciphertext out 128-bits 128-bits Features • Implements AES (Rijndael) to • key in 128/192/256-bits • • key-size select Helion Tiny AES Encryption &

SK47

Abstract: SK72
Contextual Info: Atmel ATA5580 125kHz Transponder with Open Immobilizer Software Stack and AES-128 Encryption PRELIMINARY DATASHEET Features ● AES-128 crypto transponder in plastic brick package ● Includes coil and capacitor for tuned circuit antenna ● Radio frequency fRF = 125kHz

AT24C32C

Contextual Info: ATAES132 32K AES Serial EEPROM Specification DATASHEET Features  32Kb Standard Serial EEPROM User Memory o Compatible with the Atmel AT24C32D and the Atmel AT2530B o 16 User Zones of 2Kb Each  High-security features o AES Algorithm with 128-bit Keys

Contextual Info: ATAES132 32Kb AES Serial EEPROM Specification SPI SUMMARY DATASHEET Features  32Kb standard Serial EEPROM User Memory Compatible with the Atmel AT2530B  16 user zones of 2Kb each   High-security features        AES algorithm with 128-bit keys

Contextual Info: ATAES132 32K AES Serial EEPROM Specification I2C SUMMARY DATASHEET Features  32Kb standard Serial EEPROM User Memory Compatible with the Atmel AT24C32D  16 user zones of 2Kb each   High-security features        AES algorithm with 128-bit keys

Contextual Info: ATAES132 32Kb AES Serial EEPROM Specification SPI SUMMARY DATASHEET Features  32Kb standard Serial EEPROM User Memory Compatible with the Atmel AT2530B  16 user zones of 2Kb each   High-security features        AES algorithm with 128-bit keys

Contextual Info: ATAES132 32K AES Serial EEPROM Specification I2C SUMMARY DATASHEET Features  32Kb standard Serial EEPROM User Memory Compatible with the Atmel AT24C32D  16 user zones of 2Kb each   High-security features        AES algorithm with 128-bit keys

AVR1318: Using the XMEGA built-in AES accelerator

Abstract: Application Notes add round key for aes algorithm key expansion for aes algorithm avr 256 aes AVR1318 AVR1304 XMega 256 AES with DMA Atmel AVR XMEGA dma
Contextual Info: AVR1318: Using the XMEGA built-in AES accelerator Features 8-bit Microcontrollers • Full compliance with AES FIPS Publication 197, 2002 - Both encryption and decryption procedures • 128-bit Key and State memory • XOR load option to State memory useful for cipher block coding

data encryption standard vhdl

Abstract: X9102
Contextual Info: Helion Technology FULL DATASHEET – ANS X9.102 AES Key Wrap Core for Actel FPGA Features Implements NIST AES Key Wrap Specification and AESKW mode of ANS X9.102 Supports 128-bit, 192-bit and 256-bit Key Encryption Key KEK clk reset Supports key data lengths up to

tcam

Abstract: 7815 regulator DATASHEET RFC 4k RFC1042 7815 DATASHEET Gigabit Ethernet PHY TBI transistor 7815 7815 RFC-1042 8300* HIFN
Contextual Info: Encryption • AES 128 and 256-bit • DES • 3DES Authentication • SHA-1 • MD5 • AES-XCBC-MAC Interface Bus • 4x GMII or TBI On-Chip IKE • Optional ICSAcompliant IKE running on-board • Supports Main Mode & Quick Mode • Pre-shared Key or RSA certificate

324-PIN

Abstract: RFC-1042 RFC1042 Hifn flowthrough hifn 8350 "ESP" TCAM Architecture
Contextual Info: Encryption • AES 128 and 256-bit • DES • 3DES Authentication • SHA-1 • MD5 • AES-XCBC-MAC Interface Bus • 2x GMII or TBI with 1x failover port On-Chip IKE • Optional ICSAcompliant IKE running on-board • Supports Main Mode & Quick Mode • Pre-shared Key

circuit diagram of rc transmitter and receiver

Abstract: AVR411 circuit diagram for simple RF transmitter rc car transmitter receiver Car security system block diagram car wiring diagram RF transmitter Receiver module projects how to make in home rc car avr 256 aes ATTINY45
Contextual Info: AVR411: Secure Rolling Code Algorithm for Wireless Link Features • Uses Advanced Encryption Standard AES and its Cipher-based Message Authentication Code (CMAC) mode of operation for transmitter authentication • 128, 192 or 256 bit key sizes supported

AVR411

Abstract: RF transmitter Receiver module projects Car remote keyless entry block diagram STK512 transmitter for RC car AES-CMAC LEARN ELECTRONIC CAR AVR231 rc car transmitter receiver ATtiny44
Contextual Info: AVR411: Secure Rolling Code Algorithm for Wireless Link Features • Uses Advanced Encryption Standard AES and its Cipher-based Message • • • • • • Authentication Code (CMAC) Mode of Operation for Transmitter Authentication 128, 192 or 256 Bit Key Sizes Supported

actel core 8051

Contextual Info: Revision 4 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •

transistor part number 2N2222A 338

Abstract: Actel igloo "Direct Replacement" microsemi 2n3904 j17
Contextual Info: Revision 2 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •

a51 ZENER DIODE

Abstract: transistor 2n2222 bipolar ROM EQUIVALENCES TRANSISTOR LIST ProASIC3 lvds yl 1060
Contextual Info: Revision 3 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •

Contextual Info: Revision 5 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •

transistor 7815

Abstract: 7815 7855S HIFN 7855PB4 "PPTP"
Contextual Info: Hifn HIPP Security Processor 7815 / 7855 Compression • LZS • MPPC Encryption • • • • AES 128, 192, & 256-bit DES 3DES ARC4* Authentication • SHA-1 • MD5 Public Key • RSA, DH, DSA • True Hardware Number Generator Interface Bus • PCI

SMART ASIC 197

Contextual Info: Features • • • • • • • • • Compatible with any 32-bit Embedded Microcontroller Compliant with FIPS Publication 197, Advanced Encryption Standard AES 128-bit, 192-bit or 256-bit Cryptographic Key Up to 16 Clock Cycles Encryption/Decryption Processing Time

QN108

Abstract: CORE8051 ACTEL FUSION AFS1500
Contextual Info: v2.0 Actel Fusion Family of Mixed-Signal FPGAs Features and Benefits In-System Programming ISP and Security High-Performance Reprogrammable Flash Technology Advanced Digital I/O • • • • • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents

A54 ZENER

Abstract: AFS600-FG256 mark AT0 QN108 CORE8051 bipolar ROM
Contextual Info: v2.0 Actel Fusion Family of Mixed-Signal FPGAs Features and Benefits In-System Programming ISP and Security High-Performance Reprogrammable Flash Technology Advanced Digital I/O • • • • • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents

EQUIVALENCES TRANSISTOR LIST

Contextual Info: v2.0 Actel Fusion Family of Mixed-Signal FPGAs Features and Benefits In-System Programming ISP and Security High-Performance Reprogrammable Flash Technology Advanced Digital I/O • • • • • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents

Contextual Info: Revision 6 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • Advanced 130-nm, 7-Layer Metal, Flash-Based CMOS