ADTN Search Results

geiger

Abstract: Siemens 1985
Contextual Info: Semiconductors For the trade and technical press May 1997 Siemens Semiconductor Partners with ADTRAN to Develop DSL Products; Endorses ADTRAN DSL Technology as Industry Standard Siemens, Berlin and Munich, and ADTRAN NASDAQ: ADTN , Huntsville, announced today that they have signed an agreement to jointly develop highly integrated chip

MN1874876

Abstract: CRTC MN18P76476 QFH064-P-1414B n9 357
Contextual Info: □ MN1874876 1 M N 1874876 Type • ROM x8-bit 48K 1 RAM (x8-bit) 928 I Minimum Instruction Execution Time ■ Interrupts 2/3 dividing 0.5[is (at 4 .5 to 5 .5 V , 12M H z) •R E S E T • l2C 1 T im er Counter « E x té rn a lo «S erial ♦ External 1

l 7251 wd

Abstract: nte CROSS-REFERENCE CTL2S l 7251 3.1 SPNS014 LT 7207 TMS370 SPNS014B 27282930 SPNSQ33B
Contextual Info: TMS370Cx6x 8-BIT MICROCONTROLLER SPNSQ33B - SEPTEMBER 1995 - REVISED MARCH 1996 1 CMOS/EEPROM/EPROM Technologies on a Single Device - Mask-ROM Devices for High-Volume Production - One-Time-Programmable OTP EPROM Devices for Low-Volume Production - Reprogrammable EPROM Devices for

Transistor TT 2246

Abstract: TT 2206 datasheet apm 4906 TT 2206 transistor tt 2206 tt 2246 bt 7377 SOT-23 AAAA bc 5478 AAXZ
Contextual Info: SOT TOPMARKS: 2 and 4 Letter ID Coding SOT Topmarks − April 24, 2005 Sorted By Part Number Sorted By Topmark Part Prefix Number Suffix Topmark Package Part Prefix Number Suffix Topmark Package LM 4040A EM3−2.1 FZNG 3/SOT−23 MAX 1916 ZT 1111 6/SOT−23

Contextual Info: □ M N 1874878 MN1874878 1 Type I ROM x8-bit 48K 1 RAM (x8-bit) 928 I Minimum Instruction Execution Time I Interrupts 2/3 dividing 0.5 ms (at 4.5 to 5.5V, 12MHz) • RESET «Extérnalo • l2C • Serial • Remote I Timer Counter Tim er Counter 0 • External

DS30505

Contextual Info: PIC24FJ128GC010 FAMILY 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology Advanced Analog Features Extreme Low-Power Features • 12-Bit, up to 50-Channel, High-Speed, Pipelined Analog-to-Digital A/D Converter:

Contextual Info: □ MN1879682 MN1879682 • Type 1 ROM x8-bit 96K 1 RAM (x8-bit) 1248 1 Minimum Instruction Execution Time 1 Interrupts 0 . 5 ms / 0 . 333 ms (at 4.5 to 5.5V, 12MHz) selectable •RESET • l2C 1 Timer Counter • External 0 • Serial • External 1 • Remote Control

Contextual Info: KM41C16002A CMOS DRAM 16Mx1Bit CMOS Dynamic RAM with Static Column Mode DESCRIPTION This is a family of 16,777,216 x 1 bit Static Column Mode CMOS DRAMs. Static Column Mode offers high speed random access of memory cells within the same row. Access time -5, -6, -7 or -8 and package

EN 60352

Abstract: em33
Contextual Info: AMDÌ1 Am186 EM/EMLV and Am 188 EM EMLV P R E L IM IN A R Y High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers DISTINCTIVE CHARACTERISTICS • E86 family 80C186- and 80C188-compatible microcontrollers with enhanced bus interface

SSD1325

Abstract: SEPS525 SSD1322 oled ssd1305 Densitron oled power supply Densitron oled power supply ssd1322 C0283QGLd-T DD-160128FC-1A PDT-N-160128FC-1A PDT-N-12864WE-1A
Contextual Info: Densitron OLED & AMOLED Evaluation Kits DUO OLED USB kit OLED & AMOLED Kits Densitron have developed an easy to use yet powerful and versatile development and demonstration tool for driving our range of active and passive matrix OLED displays from the USB port of a PC. DUO is

pjyp

Abstract: SO-DIMM 144-pin
Contextual Info: ADVANCE 256K, 512K x 64 SGRAM SODIMMs MICRON I TMHHOiOQV, MC. SYNCHRONOUS GRAPHICS RAM DIMM FEATURES PIN ASSIGNMENT (Front View) • 144-pin, small-outline, dual in-line memory module (DIMM) • 2MB (256K x 64) and 4MB (512K x 64) • Fully synchronous; all signals registered on positive

C0283QGLD-T

Abstract: DD-160128FC-1A DD-12864YO-3A C0283QGLH-T DD-12832YW-1A DENSITRON c0283qglh amoled AMOLED Display mini moving message display project file dd-160128
Contextual Info: DUO DENSITRON USB OLED HARDWARE AND SOFTWARE MANUAL Copyright 2006 DENSITRON TECHNOLOGIES plc. All rights reserved. – Proprietary Data TABLE OF CONTENTS 1 GENERAL DESCRIPTION. 4 1.1

Contextual Info: □ M N 1 8 7 4 8 7 6 MN1874876 1 Type 1 ROM x8-bit 48K 1 RAM (x8-bit) 928 1 Minimum Instruction Execution Time 1 Interrupts 2/3 dividing 0.5(is (at 4.5 to 5.5V, 12MHz) •RESET •l2C «Extérnalo »Serial • External 1 • Remote Control »External 2

M37705M4B

Contextual Info: MITSUBISHI MICROCOMPUTERS M 37705M 4BXXXSP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER DESCRIPTION T h e M 3 7 7 0 5 M 4 B X X X S P is a s in g le -c h ip m ic ro c o m p u te r d e ­ PIN CONFIGURATION TOP VIEW s ig n e d w ith h ig h -p e r fo r m a n c e C M O S s ilic o n g a t e t e c h n o lo ­

adtn

Contextual Info: Cable Equalizer with 2-system Switching Function CXB1441R Description The CXB1441R is a cable equalizer that compensates the attenuation resulting from cable transmission of small-amplitude differential NRZ signals. This chip has two sets of input ports comprising three pairs of differential data signals and one pair of

CXB1441R

Contextual Info: Cable Equalizer with 2-system Switching Function CXB1441R Description The CXB1441R is a cable equalizer that compensates the attenuation resulting from cable transfer of smallamplitude differential NRZ signals. This chip has two sets of input ports comprising three pairs of differential data signals and one pair of

Contextual Info: MITSUBISHI MICROCOMPUTERS M 37703E2-XXXSP is unified into M 3 7 70 3 E 2 AXXXSP. M37703E2AXXXSP M37703E2BXXXSP _ * , * PROM VER SIO N o f M 3 7 7 0 3 M 2 A X X X S P .M 3 7 7 0 3 M 2 B X X X S P DESCRIPTION PIN CONFIGURATION TOP VIEW The M37703E2AXXXSP and M37703E2BXXXSP are single­

Contextual Info: T O SH IB A UC/UP bGE ]> • cJDtî?E4ti G 0 2 4 4 4 7 S=I3 ■ T0S3 TOSHIBA TMP68008 16-BIT MICROPROCESSOR n r -< íM 7 -i« í WITH 8-BIT DATA BUS TMP68008P-8 /TMP68008P-10 Package Type : P : Plastic DIP 1. INTRODUCTION The TMP68008 is a member of the TLCS-68000 Family of advancedmicroprocessors.

r96fe-ifc

Abstract: R96DFX thermal printer interface sample code H109 D1 ROCKWELL "eye pattern generator" hz 91710 MD80C4 R96VFX 7812 ct MD80C1
Contextual Info: .ÎK f 2 ^ ite R96FE Rockwell R96FE 9600 bps Facsimile Engine Device Set INTRODUCTION FEATURES The R96FE FAXENGINE provides a com plete set of facsim ile m a chine control fun ctions integrated Into a 2-package VLSI device set. This integration reduces the

AMD k86

Contextual Info: PRELIMINARY Am186 ES/ESLV and Am188™ ES/ESLV AMD£I High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers DISTINCTIVE CHARACTERISTICS • E86™ family 80C186-/188- and 80L186-/188compatible microcontrollers with enhanced bus

MN1879682

Abstract: L3C analog adtn
Contextual Info: □ MN1879682 I Tvpe • ROM x8-bit 96K 1 RAM (x8-bit) 1248 1 Minimum Instruction Execution Time 1 Interrupts 0 . 5 ms •RESET • l2C ■ T im er Counter «E xtérnalo • Serial • External 1 • Remote Control I 0 . 333 ms (at 4.5 to 5.5V, 12MHz) selectable

62P65

Contextual Info: G 01SS7S 4SI • M IT M M IT S U B IS H I M IC RO CO M PUTERS M 37703E2-XXXSP,M 37703E2A XXXSP M 37703E2BXXXSP PROM VE R SIO N o f M 3 7 7 0 3 M 2 -X X X S P ,M 3 7 7 0 3 M 2 A X X X S P ,M 3 7 7 0 3 M 2 B X X X S P M I T S U B I S H I I1 I C I 1 P T R /J 1 IP R C

IR receiver TK 19 527

Abstract: R144EFX MD50C-4 monofax r96dfx Z/IR receiver TK 19 527
Contextual Info: R144EFX Rockwell R144EFX 14400 bps MONOFAX Modem INTRODUCTION FEATURES The Rockwell R144EFX MONOFAX modem is a synchro­ nous 14400 bits per second bps half-duplex modem. The modem is housed in a single VLSI device package. The modem can operate over the public switched tele­