ADSP2106X Search Results

universe tundra

Abstract: P1386 PCI64 VME64 VME PMC t512k
Contextual Info: Spectrum Signal Processing Odyssey Series V6 HEX SHARC VME64 Master Board The V6 board is part of SPECTRUM’s Odyssey series of 6U VME boards based on Analog Devices SHARC ADSP2106x DSPs. These boards provide a complete real-time multi-processing solution for advanced signal

P1386

Abstract: PCI64 VME64 IEEE-P1386 Spectrum VME64 universe tundra
Contextual Info: New Directions Odyssey Series V8 OCTAL SHARC VME64 Master Board PRELIMINARY INFORMATION t Eight 40 MHz SHARC ADSP2106x DSP processors t 960 MFLOPS Peak in a single 6U slot t VME64 to PCI Interface t One IEEE P1386 standard PCI PMC Site for custom or off-the-shelf I/O

multiplier and accumulator

Abstract: 4 bit binary multiplier ieee floating point 5 bit binary multiplier 8 BIT ALU types of binary multipliers
Contextual Info: Numeric Formats C.1 C OVERVIEW The ADSP-2106x supports the 32-bit single-precision floating-point data format defined in the IEEE Standard 754/854. In addition, the ADSP2106x supports an extended-precision version of the same format with eight additional bits in the mantissa 40 bits total . The ADSP-2106x also

ADSP-21489 user manual

Abstract: ADSP-21487 sharc ADSP-214xx FFT Accelerator medialb ADSP-21160 ADSP-21161 ADSP-21489 ADSP21487 sharc iir filter IBIS Model diode
Contextual Info: SHARC Processor SUMMARY The ADSP-2148x processors are available with unique audiocentric peripherals, such as the digital applications interface, serial ports, precision clock generators, S/PDIF transceiver, asynchronous sample rate converters, input

Memory

Abstract: FTS8L32512V
Contextual Info: FTS8L32512V 512Kx32 SRAM Module.3.3V FEATURES DESCRIPTION DSP Memory Solution The FTS8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC microprocessor memory solutions.

AD7665

Abstract: AD7650 AD7660 AD7663 AD7664 AD7671 AD7675 AD7676 AD7678 AD7679
Contextual Info: a FEATURES Throughput 1 MSPS Warp Mode 800 kSPS (Normal Mode) INL: ؎2.5 LSB Max (؎0.0038% of Full Scale) 16-Bit Resolution with No Missing Codes S/(N+D): 90 dB Typ @ 250 kHz THD: –100 dB Typ @ 250 kHz Analog Input Voltage Ranges Bipolar: ؎10 V, ؎5 V, ؎2.5 V

7PD33

Abstract: AD7665 AD7650 AD7654 AD7660 AD7663 AD7664 AD7675 AD7676 AD7678
Contextual Info: a FEATURES Throughput: 250 kSPS INL: ؎3 LSB Max ؎0.0046% of Full Scale 16-Bit Resolution with No Missing Codes S/(N+D): 90 dB Typ @ 100 kHz THD: –100 dB Typ @ 100 kHz Analog Input Voltage Ranges Bipolar: ؎10 V, ؎5 V, ؎2.5 V Unipolar: 0 V to 10 V, 0 V to 5 V, 0 V to 2.5 V

BC136

Abstract: ADSP-21160 ADSP-21161 ADSP-21362 ADSP-21363 ADSP-21364 ADSP-21365 ADSP-21366 key board mtm 8 pins key board mtm
Contextual Info: SHARC Processors SUMMARY DEDICATED AUDIO COMPONENTS High performance 32-bit/40-bit floating point processor optimized for high performance audio processing Single-instruction, multiple-data SIMD computational

transistor SMD BR21

Abstract: SMD Transistor W08 adsp-21369ksz smd w04 74 smd code t04 smd code W06 transistor SMD W06 sMD .v05 smd transistor w04 SMD Transistors w06 56
Contextual Info: a SHARC Processors ADSP-21367/ADSP-21368/ADSP-21369 SUMMARY Code compatible with all other members of the SHARC family The ADSP-21367/ADSP-21368/ADSP-21369 are available with a 333 MHz core instruction rate with unique audiocentric peripherals such as the digital audio interface, S/PDIF

WED8L24257V

Abstract: DSP5630X
Contextual Info: WED8L24257V Asynchronous SRAM, 3.3V, 256Kx24 FEATURES DESCRIPTION n 256Kx24 bit CMOS Static The WED8L24257VxxBC is a 3.3V, twelve megabit SRAM constructed with three 256Kx8 die mounted on a multi-layer laminate substrate. With 10 to 15ns access times, x24 width and a 3.3V

ADSP-21000

Abstract: ADSP-21020 ADSP-21060 ADSP-21062 ADSP-21062L tddg
Contextual Info: a ADSP-2106x SHARC DSP Microcomputer Family ADSP-21062/ADSP-21062L SUMMARY High Performance Signal Processor for Communications, Graphics and Imaging Applications Super Harvard Architecture Four Independent Buses for Dual Data Fetch, Instruction Fetch and Nonintrusive I/O

ADSP-21062

Abstract: ADSP-21062L ADSP-21065L
Contextual Info: a Computer Products Division ADSP-21062 & ADSP-21062L Anomaly List for Revision 3.0 June 27, 2000 These anomalies represent the currently known differences between the revision 3.0 ADSP21062/ADSP-21062L and the functionality specified in the ADSP-21062 data sheet dated April

AD7865

Abstract: AD7865-1 AD7865-2 AD7865-3 AD7865AS-1 AD7865AS-2 AD7865BS-1 AD7865YS-1
Contextual Info: a FEATURES Fast 2.4 ␮s 14-Bit ADC Four Simultaneously Sampled Inputs Four Track/Hold Amplifiers 0.35 ␮s Track/Hold Acquisition Time 2.4 ␮s Conversion Time per Channel HW/SW Select of Channel Sequence for Conversion Single Supply Operation Selection of Input Ranges: ؎10 V, ؎5 V and ؎2.5 V,

EDI8L24129V

Contextual Info: EDI8L24129V 128Kx24 SRAM 3.3 Volt FEATURES The EDI8L24129VxxBC is a 3.3V, three megabit SRAM constructed with three 128Kx8 die mounted on a multi-layer laminate substrate. With 10 to 15ns access times, x24 width and a 3.3V operating voltage, the EDI8L24129V is ideal for creating a single chip memory solution

addressing mode in core i7

Abstract: ADSP-21060 ADSP-21060L ADSP-21065L
Contextual Info: a Computer Products Division ADSP-21060 & ADSP-21060L Anomaly List for Revision 2.1 June 27, 2000 These anomalies represent the currently known differences between the revision 2.1 ADSP21060/ADSP-21060L and the functionality specified in the ADSP-21060 data sheet dated

SPORT

Abstract: ADSP-2106x ADSP-21062 ADSP-21062L ADSP-21065L
Contextual Info: a Computer Products Division ADSP-21062 & ADSP-21062L Anomaly List for Revision 2.0 & 2.1 June 27, 2000 These anomalies represent the currently known differences between the revisions 2.0 & 2.1 ADSP-21062 and the functionality specified in the ADSP-2106x data sheet dated April 1998 and

Contextual Info: ANALOG DEVICES DSP Microcomputer ADSP-21065L SDRAM Controller for Glueless Interface to Low Cost External M em ory @ 66 MHz 64M Words External Address Range 12 Programmable I/O Pins and T w o Timers w ith Event Capture Options Code-Com patible w ith ADSP-2106x Family

Contextual Info: ADSP-2106x SHARC DSP Microcomputer Family ADSP-21062/ADSP-21060 ANALOG DEVICES SUMMARY High Performance Signal Processor for Communica­ tions, Graphics, and Imaging Applications Super Harvard ARchitecture Computer SHARC — Four Independent Buses for Dual Data Fetch,

Contextual Info: ADSP-21060 Industrial SHARC DSP Microcomputer Family ADSP-21060C/ADSP-21060LC ANALOG DEVICES SU M M A R Y High Performance Signal Processor for Com munica­ tions, Graphics, and Im aging Applications Super Harvard Architecture Four Independent Buses for Dual Data Fetch,

Contextual Info: ADSP-2106X SHARC DSP Microcomputer Family ANALOG DEVICES ADSP-21061/ADSP-21061L S UM M AR Y High Performance Signal Com puter for Speech, Sound, Graphics and Imaging Applications Super Harvard Architecture Com puter SHARC — Four Independent Buses for Dual Data, Instructions,

jtag mhz

Abstract: MOUNTAIN-ICE ISA slot
Contextual Info: Mountain-ICE TM ISA-Based Emulator for SHARC DSP Processors! The Mountain-ICETM is the industry’s first scan-based, JTAG emulator designed specifically to support emulation across multiple SHARC® DSP processors. An enhanced 3V/5V JTAG pod and cable provide a non-intrusive interface to any

WED8L24513V

Contextual Info: WED8L24513V Asynchronous SRAM, 3.3V, 512Kx24 FEATURES DESCRIPTION 512Kx24 bit CMOS Static The WED8L24513VxxBC is a 3.3V, twelve megabit SRAM constructed with three 512Kx8 die mounted on a multi-layer laminate substrate. With 10 to 15ns access times, x24 width and a 3.3V

AD7671AST

Abstract: irfs 0038 AD7671 AD7671ASTRL AD7665
Contextual Info: a FEATURES Throughput: 1 MSPS Warp Mode 800 kSPS (Normal Mode) INL: ؎2.5 LSB Max (؎0.0038% of Full Scale) 16-Bit Resolution with No Missing Codes S/(N + D): 90 dB Typ @ 250 kHz THD: –100 dB Typ @ 250 kHz Analog Input Voltage Ranges: Bipolar: ؎10 V, ؎5 V, ؎2.5 V

GSM intercom circuit diagram

Abstract: sharc ADSP-21xxx architecture sharc ADSP-21xxx general block diagram sharc 21xxx architecture block diagram sharc ADSP-21xxx ADSST-DAP-EVAL01 fingerprint scanner circuit ADSP-21060 1994 MIP FLOAT LEVEL SWITCH NAT 40 reliance electric 20 hp DC motor drives
Contextual Info: 35 DSP Selection Guide 2001 Edition 19:30:35 18:30:35 12:30:35 11:30:35 09:30:35 02:30:35 01:30:35 23:00:35 19:30 Table of Contents Introduction to ADI DSPs 16-Bit DSP Key Products 32-Bit DSP Key Products ADI DSP Overview Markets & Applications Key Benefits