ADP3334ACPZ Search Results

ic 11105 circuits diagraM

Abstract: cs 730 C65 004 pin configuration cml T9 LED HSC-ADC-EVALC hsc-adc-evalcz raychem termination jointing instructions AD9627 AD9627-11 AD9627BCPZ11-105
Contextual Info: 11-Bit, 105 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9627-11 FUNCTIONAL BLOCK DIAGRAM AVDD DVDD SDIO/ SCLK/ DCS DFS CSB FD 0:3 A FD BITS/THRESHOLD DETECT DRVDD SPI PROGRAMMING DATA VIN+A SHA ADC VIN–A SIGNAL MONITOR VREF D10A D0A CLK+ CLK–

Contextual Info: 1100 MHz Variable Gain Amplifiers and Baseband Programmable Filters ADRF6518 FEATURES FUNCTIONAL BLOCK DIAGRAM Matched pair of programmable filters and triple VGAs Continuous gain control range: 72 dB Digital gain control: 30 dB Filter bypass mode bandwidth BW

7039d

Contextual Info: Wide Dynamic Range, High Speed, Digitally Controlled VGA ADL5202 Data Sheet FUNCTIONAL BLOCK DIAGRAM Dual independent, digitally controlled VGAs −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain

Contextual Info: FEATURES −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain OIP3 > 50 dBm at 200 MHz −3 dB upper frequency bandwidth of 700 MHz Multiple control interface options Parallel 6-bit control interface with latch

ic 11105 circuits diagraM

Abstract: 11105 IC ps
Contextual Info: 11-Bit, 105 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9627-11 FUNCTIONAL BLOCK DIAGRAM AVDD DVDD SDIO/ SCLK/ DCS DFS CSB FD 0:3 A FD BITS/THRESHOLD DETECT DRVDD SPI PROGRAMMING DATA VIN+A SHA ADC VIN–A SIGNAL MONITOR VREF D10A D0A CLK+ CLK–

Contextual Info: IF Diversity Receiver AD6655 FEATURES APPLICATIONS SNR = 74.5 dBc 75.5 dBFS in a 32.7 MHz BW at 70 MHz @ 150 MSPS SFDR = 80 dBc to 70 MHz @ 150 MSPS 1.8 V analog supply operation 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS output supply Integer 1-to-8 input clock divider

TBD0402

Contextual Info: Wide Dynamic Range, High Speed, Digitally Controlled VGA ADL5201 FEATURES FUNCTIONAL BLOCK DIAGRAM −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain OIP3 > 50 dBm at 200 MHz

YSML98W79H35

Abstract: XTALNX3225 TBD0402
Contextual Info: ADRF6720-27-EVALZ User Guide UG-742 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the ADRF6720-27 Wideband Quadrature Modulator with Integrated Fractional-N PLL and VCOs

ic 11105 circuits diagraM

Contextual Info: 11-Bit, 105 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9627-11 FUNCTIONAL BLOCK DIAGRAM B SO APPLICATIONS O Communications Diversity radio systems Multimode digital receivers 3G GSM, EDGE, WCDMA, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems

schematic diagram vga to composite

Abstract: NX3225SA-24MHZ SML-21OMT
Contextual Info: FEATURES Matched pair of programmable filters and VGAs Continuous gain control range: 50 dB Digital gain control: 15 dB 6-pole Butterworth filter: 1 MHz to 31 MHz in 1 MHz steps, 1 dB corner frequency Preamplifier and postamplifier gain steps IMD3: >65 dBc for 1.5 V p-p composite output

Contextual Info: High Accuracy, Low IQ, anyCAP Adjustable Low Dropout Regulator ADP3334 FEATURES High Accuracy over Line and Load: ؎0.9% @ 25؇C, ؎1.8% over Temperature 500 mA Current Capability Ultralow Dropout Voltage Requires Only CO = 1.0 ␮F for Stability anyCAP = Stable with Any Type of Capacitor

Contextual Info: IF Diversity Receiver AD6653 FEATURES APPLICATIONS SNR = 70.8 dBc 71.8 dBFS in a 32.7 MHz BW at 70 MHz @ 150 MSPS SFDR = 83 dBc to 70 MHz @ 150 MSPS 1.8 V analog supply operation 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS output supply Integer 1-to-8 input clock divider

Contextual Info: 12-Bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9627 FUNCTIONAL BLOCK DIAGRAM AVDD DVDD SDIO/ SCLK/ DCS DFS CSB FD 0:3 A FD BITS/THRESHOLD DETECT DRVDD SPI PROGRAMMING DATA VIN+A SHA ADC VIN–A SIGNAL MONITOR VREF D11A

Contextual Info: Dual High IP3, 700 MHz to 2800 MHz, Double Balanced, Passive Mixer, IF Amplifier, and Wideband LO Amplifier ADL5812 Multiband/multistandard cellular base station diversity receivers Wideband radio link diversity downconverters Multimode cellular extenders and broadband receivers

ADRF6518

Abstract: ADRF6518-EVALZ AD8130
Contextual Info: 63 MHz Dual Programmable Filters and Variable Gain Amplifiers ADRF6518 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM Matched pair of programmable filters and triple VGAs Continuous gain control range: 72 dB Digital gain control: 30 dB 6-pole Butterworth filter: 1 MHz to 63 MHz

Contextual Info: FEATURES Dual independent, digitally controlled VGAs −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain OIP3 > 50 dBm at 200 MHz −3 dB upper frequency bandwidth of 700 MHz Multiple control interface options

240v AC voltage stabilizer schematic diagram

Abstract: cml T9 LED hsc-adc-evalcz r144 085 000 raychem termination jointing instructions AD9627 AD9627-11 AD9640 D11A Register-0x10C
Contextual Info: 12-Bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9627 FUNCTIONAL BLOCK DIAGRAM AVDD DVDD SDIO/ SCLK/ DCS DFS CSB FD 0:3 A FD BITS/THRESHOLD DETECT DRVDD SPI PROGRAMMING DATA VIN+A SHA ADC VIN–A SIGNAL MONITOR VREF D11A

ada4938

Abstract: cml T9 LED HSC 301 hsc-adc-evalcz raychem termination jointing instructions AD9600BCPZ-105 AD9600BCPZ-125 AD9600BCPZ-150 AD9627 AD9627-11
Contextual Info: 10-Bit, 105 MSPS/125 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9600 FEATURES I/Q demodulation systems Smart antenna systems Digital predistortion General-purpose software radios Broadband data applications Data acquisition Nondestructive testing

ic 11105 circuits diagraM

Abstract: 240v AC voltage stabilizer schematic diagram LED0603 ind0603 0603 10UH transformer less power supply 6v output ic 11105 ps FERRITE BEAD 1000 OHM 0805 1003-08 ada4938
Contextual Info: 11-Bit, 105 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9627-11 FUNCTIONAL BLOCK DIAGRAM AVDD DVDD SDIO/ SCLK/ DCS DFS CSB FD 0:3 A FD BITS/THRESHOLD DETECT DRVDD SPI PROGRAMMING DATA VIN+A SHA ADC VIN–A SIGNAL MONITOR VREF D10A D0A CLK+ CLK–

ADL5812ACPZ-R7

Abstract: ADL5812 DB21 783 100
Contextual Info: Dual High IP3, 700 MHz to 2800 MHz, Double Balanced, Passive Mixer, IF Amplifier, and Wideband LO Amplifier ADL5812 Multiband/multistandard cellular base station diversity receivers Wideband radio link diversity downconverters Multimode cellular extenders and broadband receivers

vfac3bhl

Abstract: FIR3G IND1210 SMA200UP 0x118 HSMS-2822-BLKG AD6655 3014 LED t10 74264 emerson dcs
Contextual Info: ዐೕ‫ݴ‬णথ๭ഗ AD6655 ዷᄲ༬Ⴀ ᆌᆩ ႑ሯԲǖ74.5 dBc 75.5 dBFS Lj32.7 MHz ‫੻ټ‬Ă70 MHz @150 MSPS ࿮ሗො‫ۯ‬ༀ‫(ྷݔ‬SFDR)ǖ80 dBcLj70 MHz@150 MSPS 1.8 Vఇె‫ۉ‬ᇸࠃ‫ۉ‬ 1.8 V዁3.3 V CMOS๼‫ۉ؜‬ᇸई1.8 V LVDS๼‫ۉ؜‬ᇸ

microwave inverter panasonic

Abstract: FD056 emerson dcs D11AA Resistor 24.9ohm MR105 429mhz 74264 AD6655-125EBZ ddc synchro amplifier transformer schematic
Contextual Info: IF Diversity Receiver AD6655 FEATURES APPLICATIONS SNR = 74.5 dBc 75.5 dBFS in a 32.7 MHz BW at 70 MHz @ 150 MSPS SFDR = 80 dBc to 70 MHz @ 150 MSPS 1.8 V analog supply operation 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS output supply Integer 1-to-8 input clock divider

240v AC voltage stabilizer schematic diagram

Abstract: JEDEC DO-214AA diode microcontroller base linear voltage stabilizer cml T9 LED hsc-adc-evalcz raychem termination jointing instructions Raychem terminations high voltage test report AD9627 AD9627-11 AD9640
Contextual Info: 12-Bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9627 FUNCTIONAL BLOCK DIAGRAM AVDD DVDD SDIO/ SCLK/ DCS DFS CSB FD 0:3 A FD BITS/THRESHOLD DETECT DRVDD SPI PROGRAMMING DATA VIN+A SHA ADC VIN–A SIGNAL MONITOR VREF D11A

ic 11105 circuits diagraM

Abstract: 240v AC voltage stabilizer schematic diagram FERRITE BEAD 1000 OHM 0805 ada4938 cml T9 LED HSC-ADC-EVALC hsc-adc-evalcz raychem termination jointing instructions raychem termination kit AD9627
Contextual Info: 11-Bit, 105 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9627-11 FUNCTIONAL BLOCK DIAGRAM AVDD DVDD SDIO/ SCLK/ DCS DFS CSB FD 0:3 A FD BITS/THRESHOLD DETECT DRVDD SPI PROGRAMMING DATA VIN+A SHA ADC VIN–A SIGNAL MONITOR VREF D10A D0A CLK+ CLK–