ADN4 Search Results

ADN4663

Contextual Info: Dual, 3 V, CMOS, LVDS High Speed Differential Driver ADN4663 ±15 kV ESD protection on output pins 600 Mbps 300 MHz switching rates Flow-through pinout simplifies PCB layout 300 ps typical differential skew 700 ps maximum differential skew 1.5 ns maximum propagation delay

103-550-01

Abstract: ADN4696EBRZ-RL7
Contextual Info: 3.3 V, 200 Mbps, Half- and Full-Duplex, High Speed M-LVDS Transceivers ADN4696E/ADN4697E Data Sheet FUNCTIONAL BLOCK DIAGRAMS VCC ADN4696E RO R RE A B DE DI D 10355-001 Multipoint LVDS transceivers low voltage differential signalling driver and receiver pairs

Contextual Info: Evaluation Board User Guide UG-361 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com High Speed Evaluation Board for Full Duplex M-LVDS Transceivers ADN4692E, ADN4693E, ADN4695E, and ADN4697E

D1047

Abstract: 8304a 4PD22
Contextual Info: 3.3 V, 100 Mbps, Half- and Full-Duplex, High Speed M-LVDS Transceivers ADN4690E/ADN4692E Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAMS VCC Multipoint LVDS transceivers low voltage differential signaling driver and receiver pairs Switching rates: 100 Mbps (50 MHz)

Contextual Info: Dual, 3 V, CMOS, LVDS High Speed Differential Driver ADN4663 ±15 kV ESD protection on output pins 600 Mbps 300 MHz switching rates Flow-through pinout simplifies PCB layout 300 ps typical differential skew 700 ps maximum differential skew 1.5 ns maximum propagation delay

ADN4694EBRZ

Contextual Info: 3.3 V, 100 Mbps, Half- and Full-Duplex, High Speed M-LVDS Transceivers ADN4690E/ADN4692E/ADN4694E/ADN4695E FEATURES FUNCTIONAL BLOCK DIAGRAMS Multipoint LVDS transceivers low voltage differential signaling driver and receiver pairs Switching rate: 100 Mbps (50 MHz)

ADN4661

Abstract: ADN4662 ADN4663
Contextual Info: Single, 3 V, CMOS, LVDS Differential Line Receiver ADN4662 ±15 kV ESD protection on input pins 400 Mbps 200 MHz switching rates Flow-through pinout simplifies PCB layout 2.5 ns maximum propagation delay 3.3 V power supply High impedance outputs on power-down

Contextual Info: Evaluation Board User Guide UG-390 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com High Speed Evaluation Board for Half-Duplex M-LVDS Transceivers ADN4690E, ADN4691E, ADN4694E, and ADN4696E

ADN4600

Abstract: ADN4600ACPZ MO-220-VMMD-4
Contextual Info: 4.25 Gbps, 8 x 8, Asynchronous Crosspoint Switch ADN4600 FEATURES FUNCTIONAL BLOCK DIAGRAM ADN4600 RECEIVE EQUALIZATION CROSSPOINT ARRAY TRANSMIT PRE-EMPHASIS IP[7:0] OP[7:0] EQ PE ON[7:0] IN[7:0] ADDR[1:0] SCL SDA CONTROL LOGIC RESETB 07061-001 Full 8 × 8 crossbar connectivity

Contextual Info: Single, 3 V, CMOS, LVDS Differential Line Receiver ADN4662 Data Sheet FUNCTIONAL BLOCK DIAGRAM ±15 kV ESD protection on input pins 400 Mbps 200 MHz switching rates Flow-through pinout simplifies PCB layout 2.5 ns maximum propagation delay 3.3 V power supply

Contextual Info: Data Sheet Programmable Low Voltage 1:10 LVDS Clock Driver ADN4670 FEATURES Low output skew <30 ps typical Distributes one differential clock input to 10 LVDS clock outputs Programmable—one of two differential clock inputs can be selected (CLK0, CLK1) and individual differential clock

Contextual Info: 4.25 Gbps, 8 x 8, Asynchronous Crosspoint Switch ADN4600 FUNCTIONAL BLOCK DIAGRAM FEATURES ADN4600 RECEIVE EQUALIZATION CROSSPOINT ARRAY TRANSMIT PRE-EMPHASIS IP[7:0] OP[7:0] EQ PE ON[7:0] IN[7:0] ADDR[1:0] SCL SDA CONTROL LOGIC 07061-001 Full 8 × 8 crossbar connectivity

ADN4604-EVALZ

Contextual Info: 4.25 Gbps, 16 x 16, Digital Crosspoint Switch ADN4604 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM DVCC IP[15:0] VCC RX VTTIE, VTTIW EQ OP[15:0] TX 16 × 16 SWITCH MATRIX PREEMPHASIS IN[15:0] VTTON, VTTOS ON[15:0] CONNECTION MAP 0 CONNECTION MAP 1 OUTPUT

103-550-01

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAMS VCC Multipoint LVDS transceivers low voltage differential signaling driver and receiver pairs Switching rate: 200 Mbps (100 MHz) Supported bus loads: 30 Ω to 55 Ω Choice of 2 receiver types Type 1 (ADN4691E/ADN4693E): hysteresis of 25 mV

D0808

Abstract: ADN4665 ADN4665ARZ ADN4666 MS-012-AC R-16
Contextual Info: 3 V, LVDS, Quad, CMOS Differential Line Driver ADN4665 ±15 kV ESD protection on output pins 400 Mbps 200 MHz switching rates 100 ps typical differential skew 400 ps maximum differential skew 2 ns maximum propagation delay 3.3 V power supply ±350 mV differential signaling

ADN4665

Abstract: ADN4666 ADN4666ARZ MS-012-AC R-16
Contextual Info: 3 V, LVDS, Quad CMOS Differential Line Receiver ADN4666 ±8 kV ESD IEC 61000-4-2 contact discharge on receiver input pins 400 Mbps 200 MHz switching rates 100 ps channel-to-channel skew (typical) 100 ps differential skew (typical) 3.3 ns propagation delay (maximum)

ADN4667

Abstract: ADN4668 MS-012-AC R-16 ADN4668ARZ-REEL7
Contextual Info: 3 V LVDS Quad CMOS Differential Line Receiver ADN4668 ±15 kV ESD protection on receiver input pins 400 Mbps 200 MHz switching rates Flow-through pin configuration simplifies PCB layout 150 ps channel-to-channel skew (typical) 100 ps differential skew (typical)

Contextual Info: 3.3 V, 100 Mbps, Half- and Full-Duplex, High Speed M-LVDS Transceivers ADN4690E/ADN4692E/ADN4694E/ADN4695E FUNCTIONAL BLOCK DIAGRAMS FEATURES Multipoint LVDS transceivers low voltage differential signaling driver and receiver pairs Switching rate: 100 Mbps (50 MHz)

Contextual Info: Dual, 3 V, CMOS, LVDS Differential Line Receiver ADN4664 ±15 kV ESD protection on output pins 400 Mbps 200 MHz switching rates Flow-through pinout simplifies PCB layout 100 ps channel-to-channel skew (typical) 2.5 ns maximum propagation delay 3.3 V power supply

Contextual Info: Single, 3 V, CMOS, LVDS, High Speed Differential Driver ADN4661 ±15 kV ESD protection on output pins 600 Mbps 300 MHz switching rates Flow-through pinout simplifies PCB layout 300 ps typical differential skew 700 ps maximum differential skew 1.5 ns maximum propagation delay

Contextual Info: FUNCTIONAL BLOCK DIAGRAMS FEATURES VCC Multipoint LVDS transceivers low voltage differential signaling driver and receiver pairs Switching rate: 200 Mbps (100 MHz) Supported bus loads: 30 Ω to 55 Ω Choice of 2 receiver types Type 1 (ADN4691E/ADN4693E): hysteresis of 25 mV

ADN4667

Abstract: ADN4668 ADN4668ARUZ
Contextual Info: 3 V LVDS Quad CMOS Differential Line Receiver ADN4668 ±15 kV ESD protection on receiver input pins 400 Mbps 200 MHz switching rates Flow-through pin configuration simplifies PCB layout 150 ps channel-to-channel skew (typical) 100 ps differential skew (typical)

MS-026-BBA

Contextual Info: Data Sheet Programmable Low Voltage 1:10 LVDS Clock Driver ADN4670 FEATURES Low output skew <30 ps typical Distributes one differential clock input to 10 LVDS clock outputs Programmable—one of two differential clock inputs can be selected (CLK0, CLK1) and individual differential clock

ADN4661

Abstract: ADN4661BRZ
Contextual Info: Single, 3 V, CMOS, LVDS, High Speed Differential Driver ADN4661 ±15 kV ESD protection on output pins 600 Mbps 300 MHz switching rates Flow-through pinout simplifies PCB layout 300 ps typical differential skew 700 ps maximum differential skew 1.5 ns maximum propagation delay