ADCLK925 Search Results

ADCLK925

Abstract: ADCLK925BCPZ-WP E5500 fc8500e OC-193 FC4250 ADCLK925/PCBZ
Contextual Info: Ultrafast SiGe ECL Clock/Data Buffers ADCLK905/ADCLK907/ADCLK925 TYPICAL APPLICATION CIRCUITS VREF D Q D Q APPLICATIONS Clock and data signal restoration and level shifting Automated test equipment ATE High speed instrumentation High speed line receivers

ADCLK925

Abstract: UG-006 C10 - 0.1uF capacitor
Contextual Info: Evaluation Board User Guide UG-006 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Setting Up the Evaluation Board for the ADCLK905/ADCLK907/ADCLK925 The data sheet contains full technical details about the specifications and operation of these devices.

ADCLK925/PCBZ

Contextual Info: Ultrafast SiGe ECL Clock/Data Buffers ADCLK905/ADCLK907/ADCLK925 TYPICAL APPLICATION CIRCUITS VREF D Q D Q APPLICATIONS Clock and data signal restoration and level shifting Automated test equipment ATE High speed instrumentation High speed line receivers

JOHNSON142-0701-201

Abstract: ADCLK925BCPZ-WP AD9548 SAMTECTSW11008GD-12PIN cy7c68013a-56pvxc 10UF 22UF 47PF 560PF SAMTECTSW11008GD
Contextual Info: 8 6 7 2 3 4 5 1 DESCRIPTION DATE APPROVED GND 5 4 3 2 1 C22 REV .1UF J3 .1UF C16 .1UF C13 J1 GND 1 2 3 4 5 GND REVISIONS D VDDADCLK_3.3V GND D ADCLK925BCPZ-WP R23 49.9 .1UF R19 24.9 GND R24 49.9 R21 24.9 5 4 3 2 GND GND .1UF C45 GND 10UF .1UF C37 C36 C C50

AD9914

Abstract: ad9914bcpz polar modulator 32DDS hexadecimal 978MHz 2.4GHZ synthesizer
Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Data Sheet FEATURES 1.8 V/3.3 V power supplies Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability 3.5 GSPS internal clock speed

TRANSISTOR SMD K23

Abstract: B DIN 5463
Contextual Info: User's Guide SLAU296 – October 2009 ADS54RF63-ADX4 Single-channel, 12-bit, 2.2 GSPS Evaluation Module EVM 1 2 3 4 5 6 7 8 9 10 Contents Introduction . 2

max9291

Abstract: AD6643-200 CP-64-4 901MH AN83-5 10-com 1401M 10True
Contextual Info: Dual IF Receiver AD6643 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD AD6643 VIN+A VIN–A PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 VCM VIN+B VIN–B PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 DATA MULTIPLEXER AND LVDS DRIVERS DCO± D0±

E19 CORE TRANSFORMER

Abstract: CP-48-1 AD9524
Contextual Info: 80 MHz Bandwidth, Dual IF Receiver AD6673 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD DRVDD DVDD AGND DGND DRGND AD6673 VIN+A VIN–A PIPELINE 11-BIT ADC JESD-204B INTERFACE NSR VCM VIN+B VIN–B SYSREF± SYNCINB± CLK± RFCLK PIPELINE 11-BIT ADC HIGH

AD9250

Abstract: E19 CORE TRANSFORMER AD9524 upstream docsis cmts JESD204B
Contextual Info: 14-Bit, 170 MSPS/250 MSPS, JESD204B, Dual Analog-to-Digital Converter AD9250 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM DVDD AGND DGND DRGND AD9250 VIN+A VIN–A PIPELINE 14-BIT ADC VCM VIN+B VIN–B PIPELINE 14-BIT ADC JESD-204B INTERFACE SERDOUT0± CML, TX

max8895

Abstract: AD9613BCPZ-250
Contextual Info: FEATURES SNR = 69.6 dBFS at 185 MHz fIN and 250 MSPS SFDR = 86 dBc at 185 MHz fIN and 250 MSPS −149.9 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 770 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

circuit diagram of analog clock using logic gates

Contextual Info: FEATURES SNR = 70.6 dBFS at 185 MHz AIN and 250 MSPS SFDR = 85 dBc at 185 MHz AIN and 250 MSPS −151.6 dBFS/Hz input noise at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 785 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

AD7194

Abstract: AD7986 AD9266BCPZ-80 AD7193 AD7298 AD9265 ad7191 ADA4927 ADC-V10-IS2-09 24-Lead LFCSP footprint
Contextual Info: YOUR SEMICONDUCTOR SOLUTIONS RESOURCE Volume 10, Issue 2 ANALOG-TO-DIGITAL CONVERTER AND DRIVER ICS ADC with Configurable Filtering Adds Flexibility . . . . . . . . . . . . . . . . . . . 1 High Speed ADC Portfolio Responds to Market Demands . . . . . . . . . . . . . . . 2

AN-877

Abstract: ad9524
Contextual Info: IF Diversity Receiver AD6649 FEATURES APPLICATIONS SNR = 73.0 dBFS in a 95 MHz bandwidth at 185 MHz AIN and 245.76 MSPS SFDR = 85 dBc at 185 MHz AIN and 250 MSPS Noise density = −151.2 dBFS/Hz input at 185 MHz, −1 dBFS AIN and 250 MSPS Total power consumption: 1 W with fixed-frequency NCO,

AN-877 ANALOG DEVICES

Contextual Info: Dual IF Receiver AD6643 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD AD6643 VIN+A VIN–A PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 VCM VIN+B VIN–B PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 DATA MULTIPLEXER AND LVDS DRIVERS DCO± D0± D10± OEB

Contextual Info: Evaluation Board User Guide UG-182 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the AD9523-1 Clock Generator FEATURES GENERAL DESCRIPTION Simple power connection using USB connection and

Contextual Info: 16-Bit, 310 MSPS, 3.3 V/1.8 V Dual Analog-to-Digital Converter ADC AD9652 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD3 AVDD SDIO SCLK CSB DRVDD SPI AD9652 OR+, OR– PROGRAMMING DATA VIN+A DDR DATA INTERLEAVER LVDS OUTPUT DRIVER ADC VIN–A VREF SENSE

Contextual Info: FEATURES FUNCTIONAL BLOCK DIAGRAM SNR = 71.0 dBFS at 185 MHz AIN and 250 MSPS SFDR = 83 dBc at 185 MHz AIN and 250 MSPS −152.0 dBFS/Hz input noise at 200 MHz, −1 dBFS AIN, 250 MSPS Total power consumption: 390 mW at 250 MSPS 1.8 V supply voltages LVDS ANSI-644 levels outputs

Contextual Info: 3.5 GSPS Direct Digital Synthesizer with 12-Bit DAC AD9914 Data Sheet FEATURES 1.8 V/3.3 V power supplies Software and hardware controlled power-down 88-lead LFCSP package PLL REF CLK multiplier Phase modulation capability Amplitude modulation capability 3.5 GSPS internal clock speed

Contextual Info: Wideband IF Receiver Subsystem AD6676 Data Sheet FEATURES APPLICATIONS High instantaneous dynamic range Noise figure NF as low as 13 dB Noise spectral density (NSD) as low as −159 dBFS/Hz IIP3 up to 36.9 dBm with spurious tones <−99 dBFS Tunable band-pass Σ-Δ analog-to-digital converter (ADC)

Analog-Digital Conversion Handbook

Abstract: Analog-DigitalConversionHandbook S4 diode 6cA Tdc1007j Data Conversion Handbook
Contextual Info: ADI 技术指南合集 第一版 模数转换器 目录 ADC 噪声系数——一个经常被误解的参数 . 1 奈奎斯特准则对数据采样系统设计有何意义 .137 ADC 架构 I：Flash 转换器 .10

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

CP-32-12

Contextual Info: 14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter ADC AD9642 FUNCTIONAL BLOCK DIAGRAM FEATURES AVDD VIN+ PIPELINE 14-BIT ADC VIN– VCM AGND DRVDD D0±/D1± 14 PARALLEL DDR LVDS AND DRIVERS AD9642 D12±/D13± DCO± REFERENCE 1-TO-8 CLOCK

Contextual Info: Dual IF Receiver AD6643 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD AD6643 VIN+A VIN–A PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 VCM VIN+B VIN–B PIPELINE ADC 14 NOISE SHAPING REQUANTIZER 11 DATA MULTIPLEXER AND LVDS DRIVERS DCO± D0±

Contextual Info: 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter AD9634 FEATURES FUNCTIONAL BLOCK DIAGRAM AVDD VIN+ PIPELINE 12-BIT ADC VIN– VCM AGND DRVDD 12 D0±/D1± PARALLEL DDR LVDS AND DRIVERS AD9634 REFERENCE . . . D10±/D11± DCO± OR± 1-TO-8