AD612 Search Results

Contextual Info: CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator AD6122 ANALOG DEVICES FEATURES Fully Com pliant w ith IS98A and PCS Specifications Linear IF A m plifier -6 3 dB to +34 dB Linear-in-dB Gain Control Tem perature-Com pensated Gain Control

HP8508A

Abstract: smt03 Tektronix tds 210 FMMT4403CT-ND 32-leadless SMT-03 AD6121A HPE3610 dc/TDA 8538
Contextual Info: a CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator AD6121 FEATURES Fully Compliant with IS98A and PCS Specifications CDMA, W-CDMA, AMPS, and TACS Operation Linear IF Amplifier 5.9 dB Noise Figure –47.5 dB to +47 dB Linear-in-dB Gain Control

AD612

Abstract: AD612 and AD614
Contextual Info: AN ALO G D EV IC ES □ Self-Contained High Performance Wide Band Instrumentation Amplifiers AD612, AD614 FEATURES Pin-Programmable Gain: 1 to 1,024 in Binary Steps Fast Settling: 2tys max to 0.05%, @ G = 128 AD614A.B High Gain Accuracy: ±0.02% max (AD612C)

AD6122

Abstract: AD6122ARS AD6122ARSRL AD830 HP34970A HPE3610 IS98A SMT03 specifications of DAC 1408 HP8116A
Contextual Info: a CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator AD6122 FEATURES Fully Compliant with IS98A and PCS Specifications Linear IF Amplifier –63 dB to +34 dB Linear-in-dB Gain Control Temperature-Compensated Gain Control Quadrature Modulator

pt 8538

Contextual Info: RF/IF: IF Receivers, Transmitters Transceivers IF SUBSYSTEMS: RECEIVERS <<<<<<<<<< Mixer Input >>>>>>>> RF 1dB Range I3P Comp NF MHz dBm dBm dB Model Vss +V Iss mA AD608 2.7 7.3 Model Vss +V Iss mA AD607 2.7 8.5 500 AD6432 2.7 8 350 AD6121 2.7 10 NA AD6459

smt03

Abstract: collector modulator HP8116A AD6121 AD6122 AD6122ACP AD6122ACPRL AD6122ARS AD6122ARSRL AD830
Contextual Info: a CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator AD6122 FEATURES Fully Compliant with IS98A and PCS Specifications Linear IF Amplifier –63 dB to +34 dB Linear-in-dB Gain Control Temperature-Compensated Gain Control Quadrature Modulator

HP81

Contextual Info: a CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator AD6122 The gain control input accepts an external gain control voltage input from a DAC. It provides 97 dB of gain control with a nominal 75 dB/V scale factor. Either an internal or an external

Contextual Info: ANALOG DEVICES CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator AD6121 FEATURES Fully C om pliant w ith IS98A and PCS Specifications CDMA, W-CDMA, AMPS and TACS O peration Linear IF A m plifier 5.9 dB Noise Figure -47.5 dB to +47 dB Linear-in-dB Gain Control

HP8508A

Abstract: smt03 HP8116A C3438 AD6121 AD6121ARS AD6121ARSRL AD6122 AD830 HP34970A
Contextual Info: a CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator AD6121 FEATURES Fully Compliant with IS98A and PCS Specifications CDMA, W-CDMA, AMPS and TACS Operation Linear IF Amplifier 5.9 dB Noise Figure –47.5 dB to +47 dB Linear-in-dB Gain Control

HP8116A

Abstract: AD6121 AD6122 AD6122ARS AD6122ARSRL AD830 HPE3610 IS98A SMT03 video balun
Contextual Info: a CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator AD6122 FEATURES Fully Compliant with IS98A and PCS Specifications Linear IF Amplifier –63 dB to +34 dB Linear-in-dB Gain Control Temperature-Compensated Gain Control Quadrature Modulator

6122m

Contextual Info: CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator AD6122 ANALOG DEVICES FEATURES Fully Com pliant w ith IS98A and PCS Specifications Linear IF A m plifier -6 3 dB to 4-34 dB Linear-in-dB Gain Control Tem perature-Com pensated Gain Control

Contextual Info: CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator AD6122 ANALOG DEVICES FEATURES Fully Com pliant w ith IS98A and PCS Specifications Linear IF A m plifier -6 3 dB to +34 dB Linear-in-dB Gain Control Tem perature-Com pensated Gain Control

AD612 and AD614

Abstract: ad612 AD614 A0612A AD612A AD612B AD612C AD614A AD614B 150mV C
Contextual Info: _ _ a n a lo g 1 3 DEVICES - Self-Contained High Performance Wide Band Instrumentation Amplifiers ‘ AD612, AD614 FEATURES AD612, AD614 FUNCTIONAL BLOCK DIAGRAM Pin-Programmable Gain: 1 to 1,024 in Binary Steps Fast Settling: 20fiS max to 0.05%, @ G = 128 A D 614A .B

313MHz

Abstract: collector modulator
Contextual Info: a CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator AD6122 FEATURES Fully Compliant with IS98A and PCS Specifications Linear IF Amplifier –63 dB to +34 dB Linear-in-dB Gain Control Temperature-Compensated Gain Control Quadrature Modulator

HP81

Contextual Info: a CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator AD6121 FEATURES Fully Compliant with IS98A and PCS Specifications CDMA, W-CDMA, AMPS, and TACS Operation Linear IF Amplifier 5.9 dB Noise Figure –47.5 dB to +47 dB Linear-in-dB Gain Control

AD9763

Abstract: AD9763AST AD9763-EB AWG2021
Contextual Info: a FEATURES 10-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR to Nyquist @ 5 mHz Output: 75 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation

48-PIN

Abstract: AD9709 AD9709AST AD9709-EB AWG2021
Contextual Info: a FEATURES 8-Bit Dual Transmit DAC 125 MSPS Update Rate Excellent SFDR to Nyquist @ 5 MHz Output = 66 dBc Excellent Gain and Offset Matching: 0.1% Fully Independent or Single Resistor Gain Control Dual Port or Interleaved Data On-Chip 1.2 V Reference Single 5 V or 3 V Supply Operation

ADsc901

Abstract: ad896 dac210gx op44fz pm248 ad513 CMP05GP AC1343 DAC02ACX1 AD2020
Contextual Info: Part # 0A09 102 106 107 108 110 118 120 12040 141 142 143 146 148 149 153 16002 16014 16015 16016 16033 161 163 165 170 171 171 180 183 184 184 1S10/20 1S14/24/44/64/74 1S40 1S60 Description ? ? ? ? ? ? ? FET Op-Amp OP-AMP 14-bit RDC 16-bit RDC Form-Func. Repl.

DAC89EX

Abstract: dac86ex RBS 2111 ad42497 DAC0803 RBS 2101 ad429 AD427 AD4249 AD6422
Contextual Info: ADSP-2100 Family DSP Microcomputers ADSP-21xx a SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/ Accumulator, and Shifter

AD9754

Contextual Info: a 14-Bit, 125 MSPS High Performance TxDAC D/A Converter AD9754* FEATURES High Performance Member of Pin-Compatible TxDAC Product Family 125 MSPS Update Rate 14-Bit Resolution Excellent Spurious Free Dynamic Range Performance SFDR to Nyquist @ 5 MHz Output: 83 dBc

AD9744

Abstract: AD9744-AR AD9744-ARU AD9744-EB DB10 RU-28 I-V amplifier minicircuits t1-1t 32RL
Contextual Info: PRELIMINARY TECHNICAL DATA a 14-Bit, 165 MSPS TxDAC D/A Converter AD9744 Preliminary Technical Data FEATURES +3V REFLO AVDD REFIO FSADJ Wideband Communications TX: Digital Quadrature Modulation Architectures W-CDMA, Multi-Carrier GSM, TDMA, CDMA Systems

SMT03

Abstract: HP34970A ROOFING 8538 AD6121 AD6121ARS AD6121ARSRL AD830 HP8116A HPE3610
Contextual Info: a Preliminary Technical Data FEATURES Fully Compliant with IS98A and PCS Specifications Complies with IS98A and PCS Specifications CDMA, W-CDMA, AMPS and TACS Operation Linear IF Amplifier 5 dB Noise Figure –50 dB to +48 dB Linear-in-dB Gain Control Quadrature Demodulator

AD6278

Abstract: AD6120
Contextual Info: 7 8 DRAWI NG MADE THIS IN DRAWING THIRD IS ANGLE UNPUBLISHED. COPYRIGHT 19 6 5 3 4 2 1 PROJECTION RELEASED BY AMP FOR LOC PUBLICATION IN C O R P O R A T E D . ALL INTERNATIO NAL RIGHTS DI ST R E V ISIO N S 14 AD RESERVED. ZONE LTR D ESCRIPTIO N REDRAWN PER AD-5103

UTM ceramic RESISTOR 212-3

Abstract: AD2033 rs 380sh NyQuist 3 axis DAX 3S OP27GN IC BD 540 LYS HTC Desire 816 Dual SIM HTC A5 12SmV cmos cookbook Monsanto 7 segment displays
Contextual Info: General Information ANALOG DEVICES DATA-ACQUISITION DATABOOK 1984 VOLUME I INTEGRATED CIRCUITS Table of Contents Ordering Guide Q Operational Amplifiers Instrumentation & Isolation Amplifiers c Analog Signal Processing Components m a Voltage References Temperature Measurement Components