AD 6480 Search Results

Contextual Info: ASAHI KASEI [AK5406] AK5406 80MSPS Triple ADC for Displays General Description The AK5406 is an RGB Graphic & D-terminal Signal Process Device in which integrates 10-Bit 80Mhz AD Converters. The Device has On-Chip 3 Channels ADCs, Voltage Reference circuit, Programmable

Contextual Info: g M O TO RO LA MC54F/74F365 Ad v an ce Information MC54F/74F366 HEX BUFFER/DRIVER GATED ENABLE NON-INVERTING AND INVERTING, 3-STATE F365 HEX BUFFER/DRIVER GATED ENABLE NON-INVERTING, 3-STATE F366 HEX BUFFER/DRIVER GATED ENABLE INVERTING, 3-STATE FAST

Contextual Info: :0 9: 27 AM SBSLITE ASSP Telecom Standard Product Data Sheet Released 3M ar ch ,2 01 2 01 PM8611 In co n Fr id ay ,2 SBSLITE m of Pa rtm in er SBI Bus Serializer Proprietary and Confidential Released Issue No. 6: December 2005 Do wn lo ad ed [c on tro lle

sk a 3050 c

Abstract: SK 3050 R M6412 m6410
Contextual Info: 4 3 THIS DRAWING IS UNPUBLISHED. COPYRIGHT 2 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. LOC DIST AD 00 R E V IS IO N S LTR DESCRIPTION A DATE REVISED PER E C 0 - 0 5 - 0 1 4 5 4 5 0 3 MAYO6 DWN APVD SK MS D D BUSHING SELECTOR

Contextual Info: 9: 45 AM SBI Bus Serializer ASSP Telecom Standard Product Data Sheet Released 3M ar ch ,2 01 2 01 :0 PM8610 co n Fr id ay ,2 SBS of Pa rtm in er In SBI Bus Serializer Proprietary and Confidential Released Issue No. 5: June 2002 Do wn lo ad ed [c on tro lle

EM2005

Abstract: MSC 9752 pm8011 K2870
Contextual Info: :0 2: 53 PM SBSLITE ASSP Telecom Standard Product Data Sheet Released sd ay ,1 4D SBSLITE ec em be r, 20 05 08 PM8611 In co n W ed ne SBI Bus Serializer Proprietary and Confidential Released Issue No. 6: December 2005 Do wn lo ad ed by Co nt e nt Te a m of

PM8011

Abstract: PDH 9752
Contextual Info: 6: 20 PM SBSLITE ASSP Telecom Standard Product Data Sheet Released Au g es da y, 10 SBSLITE us t, 20 04 09 :5 PM8611 gi es , In c. on Tu SBI Bus Serializer Proprietary and Confidential Released Issue No. 5: June 2002 Do wn lo ad ed by Sc o tt E st es of i

3240 ST 9722

Abstract: GI 9728 B522 b00409
Contextual Info: 7: 59 PM SBI Bus Serializer ASSP Telecom Standard Product Data Sheet Released us t, 20 04 09 :5 PM8610 es da y, 10 Au g SBS es , In c. on Tu SBI Bus Serializer Proprietary and Confidential Released Issue No. 5: June 2002 Do wn lo ad ed by Sc o tt E st es of

vogt j8

Abstract: VOGT 406 65
Contextual Info: LM117 LM217 LM317 MOTOROLA • SEMICONDUCTOR TECHNICAL DATA THREE-TERMINAL ADJUSTABLE POSITIVE VOLTAGE REGULATORS THREE-TERMINAL ADJUSTABLE OUTPUT POSITIVE VOLTAGE REGULATORS Th e LM 1 17/217/317 are ad ju stab le 3-term inal p ositive voltage reg ulators cap ab le of su pp lyin g in e xce ss of 1.5 A over an output

B0J0

Abstract: LAVDH msu1 12-2 PMC-2021098
Contextual Info: 5: 03 AM TUPP 2488 ASSP Telecom Standard Product Data Sheet Released es da y, 09 Oc to TUPP™ 2488 be r, 20 07 04 :2 PM5364 Data Sheet Released Issue No. 7: August 2004 Do wn lo ad ed by IH S Pa r ts Ma na g em en tI nc .o fI HS IN C on Tu SONET/SDH Tributary Unit Payload

HC157A

Abstract: 74HC157A MC74HCXXXAN HC157 HC257 LS157 MC54HCXXXAJ MC74HCXXXAD HC-157A
Contextual Info: Order this data sheet by MC54HC157A/D MOTOROLA • i SEMICONDUCTOR TECHNICAL DATA MC54/74HC157A Advance Information Q u ad 2 -In p u t D a ta S e le c to rs / M u ltip le x e rs J SUFFIX CERAMIC CASE 620-09 H ig h -P erfo rm a n ce S ilic o n -G a te C M O S

Contextual Info: 9: 20 AM TUPP 2488 ASSP Telecom Standard Product Data Sheet Released ay ,0 2S ep te m TUPP™ 2488 be r, 20 04 10 :0 PM5364 Data Sheet Released Issue No. 7: August 2004 Do wn lo ad ed by C on te n tT ea m of Pa rtm in er In co n Th ur sd SONET/SDH Tributary Unit Payload

SN75174

Abstract: SN75174N SN75172 "functionally interchangeable"
Contextual Info: MOTOROLA SC { T E L E C Ö Ä > o i ~ B E j f c 3 b 7 S S 3 0 0 71 75 3 S | ~ 6367253 MOTOROLA SC TELECOM 0 1E 79753 -T ~ 7 r - M O T O R O ^ - D 6 5 - SN75172 SN75174 L A < S> Product Preview QUAD LINE DRIVERS WITH NAND ENABLED THREE-STATE OUTPUTS Q U AD EIA-485 LINE DRIVERS

Contextual Info: M M O T O R O L A MC74AC157 MC74ACT157 Q u ad 2-Input M u ltip le xer Q UAD 2-INPUT MULTIPLEXER The MC74AC157/74ACT157 is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the com m on Select and Enable inputs. The four outputs present the selected data in the true (noninverted) form.

la 7518

Abstract: 74ACT399 MC74AC398 MC74AC399 MC74ACT398 ABE 444
Contextual Info: g M C74AC398 M C74ACT398 M C74AC399 M C74ACT399 M O T O R O L A Product Preview Q u ad 2-Port R e giste r The M C 7 4 A C 3 9 8 / 7 4 A C T 3 9 8 and M C 74A C 3 9 9 / 7 4 A C T 3 9 9 are the logical eq u iva­ lents of a quad 2-input m ultiplexer feeding into four edge-triggered flip-flops. A

Contextual Info: M OTOROLA D E S C R I P T I O N — The S N 5 4 L S /7 4 L S 2 9 8 is a Q uad 2-Port Register. It is th e lo gical equivalent of a q u ad 2-irtput. m ultiplexer follow ed by a quad 4 -b it edge-triggered register. A C om m on Select input selects betw een tw o 4 -bit input ports data sources. The selected data is

SMD C10H

Contextual Info: M M O T O R O LA Military 10513 Quad Exclusive OR Gate ELECTRICALLY TESTED PER: 5962-8755801 T h e 1 05 1 3 is a Q u ad E x c lu s iv e O R G a te w ith an e n a b le com m on to all g ate s. T h e outputs m a y be w ire -O R e d together to perform a 4-bit co m p ariso n function

Contextual Info: Ä M O TO R O LA MC54F/74F175 QUAD D FLIP-FLOP Q U AD D FLIP-FLO P FA ST D E S C R IP T IO N — Th e M C 5 4 F / 7 4 F 1 75 is a high-speed quad 0 flipflop. T h e d evice is useful for g eneral flip-flop req uirem ents w h ere clock and cle ar inputs are com m on. Th e inform ation on the D inputs is

sla 1003

Abstract: 7m 0880 IC
Contextual Info: M O T O R O MC10177 L A TRIPLE MECL TO NMOS TRANSLATOR U Jh Th e M C10177 c o n sists of three M E C L to M O S tran slato rs w hich co n ve rt M E C L 10,000 log ic le ve ls to N M O S le ve ls. It is designed fo r use in N -channel m e m o ry s y s te m s as a Read/W rite, Data/Ad­

Contextual Info: VG26V S 64(5)805B 8,388,608 x 8-Bit CMOS Dynamic RAM Preliminary visïïà D escription x T h e d e v ic e is C M O S D y n a m ic R A M o rg an ize d as 8 ,3 8 8 ,6 0 8 w ords 8 bits with exten d ed d ata out a c c e s s m o d e. It is fab ricated w ith an ad v a n ce d subm icron C M O S tech no log y and

MC26S10

Contextual Info: MC26S10 MC26S11 MOTOROLA Q U AD OPEN-CO LLECTO R BU S T R A N S C E IV E R S Q U A D OPEN-CO LLECTO R BU S T R A N S C E IV E R S T he se q u a d transceivers are designed to m ate S c h o t t k y T T L or SCHOTTKY S IL IC O N M O N O L IT H IC IN T E G R A T E D C IR C U IT

Contextual Info: g MOTOROLA SN54LS170 SN74LS170 D E S C R IP T IO N — T he T T L /M S I S N 5 4 L S / 7 4 L S 1 7 0 is a hig h -s p e e d , lo w 'p o w e r 4 x 4 R e gister File org a n iz e d as fo u r w o rd s by fo u r bits. S e p a ra te read and w r ite in p u ts , b o th ad d re ss a n d ena ble, a llo w

Contextual Info: GM71V64803A GM71VS64803AL LG S em îco n C o.X td , 8,388,608 WORDS x 8 BIT CMOS DYNAMIC RAM Description Pin Configuration The GM71V S 64803A/AL is the new generation dynamic RAM organized 8,388,608 words by 8bits. The GM71V(S)64803A/AL utilizes advanced CMOS

Contextual Info: SIEM ENS 8M x 8 -Bit Dynamic RAM HYb 3 1 64805AJ/AT L -40/-50/-60 (4k & 8 k-Refresh, EDO-version) HYB 3165805AJ/AT(L) -40/-50/-60 P r e lim in a r y In fo rm a tio n • 16 777 216 words by 4-bit organization • 0 to 70 "C operating tem perature • Hyper Page M ode - EDO - operation