ACTV M3 Search Results

concurrent rdram

Abstract: RDRAM CONCURRENT es a 00112 concurrent rdram 72 mbit concurrent RDRAM 72 9 rambus concurrent rdram R64MC-50-600 SVP-32 rdram clock generator concurrent RDRAM 72
Contextual Info: Preliminary Information Concurrent RDRAM ® 16/18Mbit 2Mx8/9 & 64/72Mbit (8Mx8/9) RAMBUS Overview The 16/18/64/72-Mbit Concurrent Rambus DRAMs (RDRAM) are extremely high-speed CMOS DRAMs organized as 2M or 8M words by 8 or 9 bits. They are capable of bursting unlimited lengths of data at 1.67 ns

53MC CONTROLLER

Abstract: RDRAM SOP OKI D51 MD5764802-53MC MD5764802-60MC MSM5718C50-53GS-K MSM5718C50-60GS-K SHP32-P-1125-0 78D SOP
Contextual Info: E2G1059-28-Y1 This version: Nov. 1998 MSM5718C50/MD5764802 Previous version: Jul. 1998 ¡ Semiconductor MSM5718C50/MD5764802 ¡ Semiconductor 18Mb 2M ¥ 9 & 64Mb (8M ¥ 8) Concurrent RDRAM DESCRIPTION The 18/64-Megabit Concurrent Rambus DRAMs (RDRAM ) are extremely high-speed

RDRAM SOP

Abstract: OKI D51 concurrent rdram MD5764802-53MC MD5764802-60MC MSM5718C50-53GS-K MSM5718C50-60GS-K SHP32-P-1125-0 ACTV m3 OKI D51 a24
Contextual Info: E2G1059-39-21 This version: Feb. 1999 MSM5718C50/MD5764802 Previous version: Nov. 1998 ¡ Semiconductor MSM5718C50/MD5764802 ¡ Semiconductor 18Mb 2M ¥ 9 & 64Mb (8M ¥ 8) Concurrent RDRAM DESCRIPTION The 18/64-Megabit Concurrent Rambus DRAMs (RDRAM ) are extremely high-speed

m15m

Abstract: MSM5718C50 MSM5718C50-53GS-K MSM5718C50-60GS-K
Contextual Info: e Pr lim MSM5718C50 18-Megabit Concurrent RDRAM 2M ¥ 9 DESCRIPTION The 18-Megabit Concurrent Rambus DRAMs (RDRAM ) are extremely high-speed CMOS DRAMs organized as 2M words by 9 bits. They are capable of bursting unlimited lengths of data at 1.67 ns per byte (13.3 ns per eight bytes). The use of Rambus Signaling Level (RSL) technology permits

MIL-STD-1553 schematic fpga

Abstract: PM-DB2791 3C80 555 timer project holt ic 6110 3EC0 an555 6110RT_FPGA_2.ZIP Holt 1553 Controller - HI6110 1A80
Contextual Info: AN-555 HI-6110 RT FPGA Integration Application Note May 4, 2012 Introduction This application note demonstrates how to implement a MIL-STD-1553 remote terminal RT using an HI-6110 single message processor managed by a field-programmable gate array (FPGA). The provided

hfdw

Contextual Info: _ ü 16/18Mbit 2Mx8/9 & 64/72Mbit (8Mx8/9) ConcurrentRDRAM Overview VDD GND BUSDATA[8] GND BUSDATA[7] (NC) BUSENABLE VDD BUSDATA[6] GND BUSDATA[5] VDDA RXCLK GNDA TXCLK VDD BUSDATA[4] GND BUSCTRL SIN VREF SOUT BUSDATA[3] GND BUSDATA[2] (NC)

concurrent RDRAM 72 9

Abstract: MD5764802 MSM5718C50 18MSHP concurrent RDRAM 72
Contextual Info: J2G1059-39-21 ¡ 電子デバイス 作成：1999年 2月 前回作成：1998年11月 MSM5718C50/MD5764802 l MSM5718C50/MD5764802 18Mb（2Mx9）& 64Mb（8M×8）Concurrent RDRAM n 概要 18/64メガビットコンカレントRambus‘ DRAM（RDRAM）は2Mまたは8Mワード×8または9ビット構

KM49RC2H-A60

Abstract: RDRAM CONCURRENT KM49RC2H samsung datecode samsung concurrent rdram RC2H-A66 concurrent RDRAM 72 9 concurrent rdram
Contextual Info: KM48RC2H/KM49RC2H Concurrent RDRAM 2M X 8 / 2 M x 9 Concurrent RDRAM Overview Ordering Information The 16 / 18Mbit Concurrent Rambus DRAMs RDRAM are Part No. Org. frequency KM49RC2H-A60 2M X 9 600Mhz extremely high-speed CMOS DRAMs organized as 2M words

OKI D51 a24

Abstract: OKI D51 MD5764802 MSM5718C50 MD5764802-53MC 141oC concurrent rdram concurrent RDRAM 72 9 13c64 concurrent rdram oki
Contextual Info: お客様各位 資料中の「沖電気」「ＯＫＩ」等名称の OKI セミコンダクタ株式会社への変更について 2008 年 10 月 1 日を以って沖電気工業株式会社の半導体事業は OKI セミコン ダクタ株式会社に承継されました。 従いまして、本資料中には「沖電気工業株

HY5RC1809

Abstract: concurrent rdram L3C analog hyundai concurrent rdram hyundai rdram concurrent RDRAM 72 HY5RC1809-66 concurrent rdram hyundai concurrent rdram 72 mbit HY5RC1809-53
Contextual Info: HY5RC1809 / 6408 Series “HYUNDAI 18Mb 2Mx9 / 64Mb(8Mx8), Concurrent RDRAM Preliminary Overview The 18/64M b C o n cu rre n t R am bus DRAMs (RDRAM) are extremely high-speed CMOS DRAMs organized as 2M words by 9 bits or 8M words by 8 bits. They are capable of bursting unlimited length of

Contextual Info: SMJ626162 524288 BY 16-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY SGMS737A - JULY 1997 - REVISED NOVEMBER 1997 Organization 512K x 16 Bits x 2 Banks 3.3-V Power Supply ±5% Tolerance Two Banks for On-Chip Interleaving (Gapless Accesses) High Bandwidth - Up to 66-MHz Data Rates

TMS626802

Abstract: SDRAM 1994 Texas Instruments
Contextual Info: i m gv^uuvci 1 048576-WORD BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY SMOS182B - FEBRUARY 1994 - REVISED JUNE 1995 Organization . . . 1M x 8 x 2 Banks 3.3-V Power Supply ±10% Tolerance Two Banks for On-Chip Interleaving (Gapless Accesses)

texas instruments 77261

Abstract: TEXAS 77261 N03J
Contextual Info: TMS626802 1048576-WORD BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY SMOS182A - FEBRUARY 1994 - REVISED JUNE 1995 Organization . . . 1M x 8 x 2 Banks 3.3-V Power Supply ±10% Tolerance Two Banks for On-Chip Interleaving (Gapless Accesses) High Bandwidth - Up to 100-MHz Data

TMS6264

Abstract: TMS626402 CLOCK30 AND-02
Contextual Info: 2097152-WORD BY 4-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY SMOS642B - FEBRUARY 1994 - REVISED JUNE 1995 DGEPACKAGE TOP VIEW • Organization . . . 2M x 4 x 2 Banks • 3.3-V Power Supply (±10% Tolerance) • Two Banks for On-Chip Interleaving

SMOS182

Contextual Info: TMS626802, TMS636802 1048576-WORD BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES SMOS182 - FEBRUARY 1994 TM S626802 LVTTL DGE PACKAGE (TO P VIE W ) 3.3-V Power Supply (10% Tolerance) Two Banks for On-Chip Interleaving (Gapless Accesses) vcc [ 1

5460 bsz

Abstract: 0C00 SH7206 A13A2
Contextual Info: APPLICATION NOTE SH7206 Group Example of BSC SDRAM Interface Setting 32-Bit Bus Introduction This document describes the synchronous DRAM (SDRAM) interface of the bus state controller (BSC) and provides a practical example of SDRAM connection. Target Device

5460 bsz

Abstract: 0C00 SH7206
Contextual Info: APPLICATION NOTE SH7206 Group Example of BSC SDRAM Interface Setting 16-Bit Bus Introduction This document describes the synchronous DRAM (SDRAM) interface of the bus state controller (BSC) and provides a practical example of SRAM connection. Target Device

0C00

Abstract: SH7670 0xa55a
Contextual Info: APPLICATION NOTE SH7670 Group Example of BSC SDRAM Interface Connection 32-Bit Data Bus Introduction This application note introduces the synchronous DRAM (SDRAM) interface of the bus state controller (BSC) of SH7670/SH7671/SH7672/SH7673 products and includes a sample application.

Contextual Info: HM5216805-A60, HM5216405-A60 1,048,576-word x 8-bit x 2-bank Synchronous Dynamic RAM 2,097,152-word x 4-bit x 2-bank Synchronous Dynamic RAM HITACHI ADE-203-796 Z Preliminary, Rev. 0.0 Jun. 26, 1997 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216805 Series,

Contextual Info: HM5216165 Series 524,288-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI ADE-203-280B Z Rev. 2.0 Jun. 20, 1997 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2 banks for improved performance.

_INITSCT

Abstract: MT48LC4M16A2 H8S/2377 E10A-USB
Contextual Info: APPLICATION NOTE H8S Family SDRAM Control Introduction This sample task connects the SDRAM to the H8S microcomputer by using the SDRAM control function of the bus controller. Target Device H8S/2377R Contents 1. Overview . 2

31ZA8

Contextual Info: HM5216165 Series 524,288-word x 16-bit x 2-bank Synchronous Dynamic RAM HITACHI ADE-203-280A Z Rev. 1.0 Dec. 20, 1996 Description All inputs and outputs are referred to the rising edge of the clock input. The HM5216165 is offered in 2 banks for improved performance.

Contextual Info: HB526C164EN Series 524,288-word x 64-bit x 2-bank Synchronous Dynamic RAM Module HITACHI ADE-203-628 Z Preliminary Rev. 0.0 . 18, 1996 Description The HB526C164EN belongs to 8-byte DIMM (Dual In-line Memory Module) family, and has been

Contextual Info: HM5264165 Series HM5264805 Series HM5264405 Series 1,048,576-word X 16-bit x 4-bank Synchronous Dynamic RAM 2,097,152-word X 8-bit x 4-bank Synchronous Dynamic RAM 4,194,304-word X 4-bit X 4-bank Synchronous Dynamic RAM HITACHI ADE-203-497 Z Preliminary Rev. 0.3