ZL30406 Search Results

GR-253-CORE

Abstract: STM16 STM-16 ZL30406 ZL30406QGC ZL30406QGG1 CML termination 50 Ohm external termination volt
Contextual Info: ZL30406 SONET/SDH Clock Multiplier PLL Data Sheet Features March 2006 • Meets jitter requirements of Telcordia GR-253CORE for OC-48, OC-12, and OC-3 rates • Meets jitter requirements of ITU-T G.813 for STM16, STM-4 and STM-1 rates • Provides four LVPECL differential output clocks at

GR-1244-CORE

Abstract: GR-253-CORE MT90401 OC48 STM-16 ZL30406
Contextual Info: ZLAN-34 Applications of the ZL30406 and MT90401 SONET/SDH Linecard Solutions Application Note Contents August 2003 1.0 1.0 Summary 2.0 SONET/SDH Linecard Solutions 2.1 SONET/SDH Linecard requirements 2.2 MT90401 + ZL30406 Solution 2.2.1 Introduction 2.2.2 Design Considerations

ZLAN

Abstract: GR-253-CORE GR-1244-CORE MT9045 MT9046 STM-16 ZL30406 capacitor 102 STM
Contextual Info: ZLAN-35 Applications of the ZL30406 and MT9046 SONET/SDH Linecard Solutions Application Note Contents June 2004 1.0 1.0 Summary 2.0 SONET/SDH Linecard Solutions 2.1 SONET/SDH Linecard Requirements 2.2 MT9046 + ZL30406 Solution 2.2.1 Introduction 2.2.2 Design Considerations

SerDes STm

Contextual Info: World’s Only SONET/SDH Analog PLL With 6 Ultra Low Jitter Outputs VOICE / DATA WIRELESS Reference From System Timing Distribution or DPLL Ultra Low Jitter Output Clocks SET-TOP BOX ZL30406 SONET/SDH Clock Multiplier PLL Analog PLL Output Clock Interface

GR-253-CORE

Abstract: STM16 STM-16 ZL30406 ZL30406QGC C77D-AC 120TRF
Contextual Info: ZL30406 SONET/SDH Clock Multiplier PLL Data Sheet Features June 2004 • Meets jitter requirements of Telcordia GR-253CORE for OC-48, OC-12, and OC-3 rates • Meets jitter requirements of ITU-T G.813 for STM16, STM-4 and STM-1 rates • Provides four LVPECL differential output clocks at

GR-253-CORE

Abstract: STM16 STM-16 ZL30406 ZL30406QGC
Contextual Info: ZL30406 SONET/SDH Clock Multiplier PLL Data Sheet Features • • • • • • • • May 2003 Meets jitter requirements of Telcordia GR-253CORE for OC-48, OC-12, and OC-3 rates Meets jitter requirements of ITU-T G.813 for STM16, STM-4 and STM-1 rates

kcf 201

Contextual Info: ZL30406 SONET/SDH Clock Multiplier PLL Data Sheet Features July 2011 • Meets jitter requirements of Telcordia GR-253CORE for OC-48, OC-12, and OC-3 rates • Meets jitter requirements of ITU-T G.813 for STM16, STM-4 and STM-1 rates Ordering Information •

GR-253-CORE

Abstract: MT90401 MT9046 STM-16 ZL30406 ZL30407
Contextual Info: ZL30406 SONET/SDH CLOCK MULITPLIER APLL VOICE / DATA ZL30406 Simplified Block Diagram SONET/SDH Clock Multiplier APLL Output Clock Interface Analog PLL 19.44MHz Reference Jitter Attenuation and Rate Conversion Quad Differential LVPECL Programmable Differential CML

Contextual Info: ZL30406 SONET/SDH Clock Multiplier PLL Data Sheet Features • • • • • • • • May 2003 Meets jitter requirements of Telcordia GR-253CORE for OC-48, OC-12, and OC-3 rates Meets jitter requirements of ITU-T G.813 for STM16, STM-4 and STM-1 rates

Contextual Info: www.ZARLINK.com ZL30406 APLL Ad5 EET-CH2.indd 1 5/16/03, 9:52 AM

GR-253-CORE

Abstract: STM16 STM-16 ZL30406 ZL30406QGC ZL30406QGC1
Contextual Info: ZL30406 SONET/SDH Clock Multiplier PLL Data Sheet Features February 2005 • Meets jitter requirements of Telcordia GR-253CORE for OC-48, OC-12, and OC-3 rates • Meets jitter requirements of ITU-T G.813 for STM16, STM-4 and STM-1 rates • Provides four LVPECL differential output clocks at

Contextual Info: ZL30461 COMPACT STRATUM 3 TIMING MODULE VOICE / DATA ZL30461 Simplified Block Diagram 9ecfWYjIjhWjkc J_c_d]CeZkb[ Acquisition PLLs 8 kHz, 1.5, 2 & 19 MHz Primary Reference Independant Frequency Detection & Monitoring Secondary Reference Core Digital PLL

osc XTAL

Abstract: ZL30108 "network interface cards"
Contextual Info: DIGITAL PLL ZL30108 PRODUCT PREVIEW The ZL30108 is the world’s smallest digital phase locked loop DPLL for SONET/SDH line cards in high-speed networking equipment. Measuring just 5 mm x 5 mm, the device provides high-performance line card synchronization that surpasses all OC-3/STM-1 specifications. With integrated features, including reference monitoring, reference switching, automatic

ZL30406

Abstract: ZL30407 ZL30414 ZL30415 ZL30416 GR-253-CORE ZL30106
Contextual Info: ZL30106 SONET/SDH/PDH NETWORK INTERFACE DIGITAL PLL VOICE/DATA ZL30106 Simplified Block Diagram High Performance IED;J%I:>%F:> D[jmeha?dj[h\WY[:FBB Clock & Sync Pair Inputs Independant Input References Primary Reference 2, 8 kHz, 1.5, 2, 8, 16 or 19 MHz

Contextual Info: Analog PLL TIMING AND SYNCHRONIZATION VOICE/DATA Part # Features Input Frequencies MHz Output Frequencies Fixed Output Clocks (MHz) 3.3V Individual Output Clock Enable/Disable CMOS Differential CML 622.08 155.52 77.76 38.88 Frequency 19.44 Programmable Output