VG264265
Abstract: VG264260B
Contextual Info: VG264260BJ 262,144x16-Bit CMOS Dynamic RAM VIS TRUTH TABLE 2-CKE Notes: 1-4 CKEn-1 CKE n CURRENT STATE COMANDn ACTIONn L L Power-Down X Maintain Power-Down Self Refresh X Maintain Self Refresh Power-Down COMMAND INHIBIT or NOP Exit Power-Down 5 Self Refresh
|
Original
|
vg264260bj144x16-bitedg161g5-0157+2vg264265vg264260b
|
PDF
|
VG264265BJ
Abstract: VG264260BJ-35 vg264265bj-35 VG264265 VG264260B VG26V4265BJ vg264265b
Contextual Info: VG26V4265BJ 262, 144 x 16 - Bit CMOS Dynamic RAM VIS Description The device is CMOS Dynamic RAM organized as 262,144 words x 16 bits with extended data out access mode. It is fabricated with an advanced submicron CMOS technology and advanced CMOS circuit design
|
Original
|
40-pinvg26v4265bj50/60/70ns1g5-0090+10vg264260bj-35vg264260bj-4vg264260bj-45vg264260bj-5300milvg264265bjvg264265bj-35vg264265vg264260bvg264265b
|
PDF
|
VG264265
Abstract: VG264265B VG264260SJ-50 VG264265BJ CAC10 VG264 DOUT20
Contextual Info: V G 264260BJ 262,144 x 16-Bit CMOS Dynamic RAM Description The device is CMOS Dynamic RAM organized as 262,144-word x 16 bits. It is fabricated with an advanced submicron CMOS technology and advanced CMOS circuit design technologies. It is packaged in JEDEC standard 40-pin plastic SOJ package.
|
OCR Scan
|
264260bj16-bit144-word40-pin+7vg264265vg264265bvg264260sj-50vg264265bjcac10vg264dout20
|
PDF
|