TV855 Search Results

CY2SSTV855

Abstract: CY2SSTV855ZC CY2SSTV855ZCT
Contextual Info: TV855 TV855 Differential Clock Buffer/Driver Features Description • Phase-locked loop clock distribution for Double Data Rate Synchronous DRAM applications • 1:5 differential outputs • External feedback pins FBINT, FBINC are used to synchronize the outputs to the clock input

Contextual Info: TV855 TV855 Differential Clock Buffer/Driver Features Description • Phase-locked loop clock distribution for Double Data Rate Synchronous DRAM applications • 1:5 differential outputs • External feedback pins FBINT, FBINC are used to synchronize the outputs to the clock input