TL16C752B Search Results

XR16L2750

Abstract: XR16C2850 XR16C2750 MCR 48 ST16C2550 TL16C752B XR16L2751
Contextual Info: DATA COMMUNICATIONS APPLICATION NOTE DAN130 June 2002 EXAR’S DUARTS COMPARED WITH TI’S TL16C752B Author: PY 1.0 INTRODUCTION This application note describes the major difference between Exar’s DUARTs ST16C2550, XR16L2750, XR16L2751 and XR16C2850 with TI’s TL16C752B. These devices are very similar, with a few hardware,

B0415

Abstract: T0471-01 T0469-01
Contextual Info: TL16C752B www.ti.com SLLS405C – DECEMBER 1999 – REVISED JUNE 2010 3.3-V Dual UART With 64-Byte FIFO Check for Samples: TL16C752B FEATURES • • • 1 • • • • • • • • • • Pin Compatible With ST16C2550 With Additional Enhancements Up to 1.5 Mbps Baud Rate When Using Crystal

Contextual Info: TL16C752B 3.3-V DUAL UART WITH 64-BYTE FIFO SLLS405A – DECEMBER 1999 – REVISED AUGUST 2000 D D D D D D D D D D Pin Compatible With ST16C2550 With Additional Enhancements Up to 1.5 Mbps Baud Rate When Using Crystal 24 MHz Input Clock Up to 3 Mbps Baud Rate When Using

RX2 pin DIAGRAM

Contextual Info: TL16C752B-EP 3.3-V DUAL UART WITH 64-BYTE FIFO www.ti.com SGLS153A – FEBRUARY 2003 – REVISED MARCH 2007 FEATURES • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an

Contextual Info: TL16C752B-EP 3.3 V DUAL UART WITH 64-BYTE FIFO www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an

T0467-01

Abstract: B0417
Contextual Info: TL16C752B www.ti.com SLLS405C – DECEMBER 1999 – REVISED JUNE 2010 3.3-V Dual UART With 64-Byte FIFO Check for Samples: TL16C752B FEATURES • • • 1 • • • • • • • • • • Pin Compatible With ST16C2550 With Additional Enhancements Up to 1.5 Mbps Baud Rate When Using Crystal

Contextual Info: TL16C752B 3.3-V DUAL UART WITH 64-BYTE FIFO SLLS405A – DECEMBER 1999 – REVISED AUGUST 2000 D D D D D D D D D D Pin Compatible With ST16C2550 With Additional Enhancements Up to 1.5 Mbps Baud Rate When Using Crystal 24 MHz Input Clock Up to 3 Mbps Baud Rate When Using

Contextual Info: TL16C752B-EP www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 3.3 V DUAL UART WITH 64-BYTE FIFO Check for Samples: TL16C752B-EP FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and

TL16C752BPT

Abstract: XR16L2551IM TL16C752B XR16L2550 XR16L2550IM XR16L2551
Contextual Info: DATA COMMUNICATIONS APPLICATION NOTE DAN138 November 2003 EXAR’S XR16L2550 AND XR16L2551 COMPARED WITH TI’S TL16C752B Author: PY 1.0 INTRODUCTION This application note describes the major difference between Exar’s 2-channel UARTs XR16L2550 and XR16L2551 with TI’s TL16C752B. These devices are similar, with a few hardware, firmware-related and bus

lathes

Abstract: ST16C2550 TL16C752B TL16C752B-EP TL16C752BLPTREP TL16C752BTPTREP MCR-3
Contextual Info: TL16C752B-EP 3.3 V DUAL UART WITH 64-BYTE FIFO www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an

Contextual Info: TL16C752B 3.3-V DUAL UART WITH 64-BYTE FIFO SLLS405A – DECEMBER 1999 – REVISED AUGUST 2000 D D D D D D D D D D Pin Compatible With ST16C2550 With Additional Enhancements Up to 1.5 Mbps Baud Rate When Using Crystal 24 MHz Input Clock Up to 3 Mbps Baud Rate When Using

Contextual Info: TL16C752B-EP 3.3-V DUAL UART WITH 64-BYTE FIFO SGLS153 – FEBRUARY 2003 D Controlled Baseline D D D D D D D D D D D D D Optional Data Flow Resume by Xon Any – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C to 110°C

Contextual Info: TL16C752B-EP 3.3 V DUAL UART WITH 64-BYTE FIFO w w w .t i.c om SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an

MS-026

Abstract: S-PQFP-G48 ST16C2550 TL16C752 TL16C752B
Contextual Info: TL16C752B 3.3-V DUAL UART WITH 64-BYTE FIFO SLLS405A – DECEMBER 1999 – REVISED AUGUST 2000 D D D D D D D D D D Pin Compatible With ST16C2550 With Additional Enhancements Up to 1.5 Mbps Baud Rate When Using Crystal 24 MHz Input Clock Up to 3 Mbps Baud Rate When Using

lathes

Abstract: diode td15 MS-026 S-PQFP-G48 ST16C2550 TL16C752B-EP TL16C752BTPTREP
Contextual Info: TL16C752B-EP 3.3-V DUAL UART WITH 64-BYTE FIFO SGLS153 – FEBRUARY 2003 D Controlled Baseline D D D D D D D D D D D D D Optional Data Flow Resume by Xon Any – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C to 110°C

Contextual Info: TL16C752B-EP 3.3-V DUAL UART WITH 64-BYTE FIFO SGLS153 – FEBRUARY 2003 D Controlled Baseline D D D D D D D D D D D D D Optional Data Flow Resume by Xon Any – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C to 110°C

MS-026

Abstract: S-PQFP-G48 ST16C2550 TL16C752 TL16C752B
Contextual Info: TL16C752B 3.3-V DUAL UART WITH 64-BYTE FIFO SLLS405 – DECEMBER 1999 D D D D D D D D D D Pin Compatible With ST16C2550 With Additional Enhancements Up to 1.5 Mbps Baud Rate When Using Crystal 24 MHz Input Clock Up to 2.25 Mbps Baud Rate When Using Oscillator or Clock Source (36 MHz Input

TL16C752B

Contextual Info: SLLZ049 TEXAS INSTRUMENTS TL16C752B Errata August 2006 1. Problem: The TL16C752B UART correctly generates a character timeout interrupt if IER0 set when the serial input (RX) has gone quiescent (continuously high) for more than four character times. The problem is

MS-026

Abstract: S-PQFP-G48 ST16C2550 TL16C752 TL16C752B
Contextual Info: TL16C752B 3.3-V DUAL UART WITH 64-BYTE FIFO SLLS405A – DECEMBER 1999 – REVISED AUGUST 2000 D D D D D D D D D D Pin Compatible With ST16C2550 With Additional Enhancements Up to 1.5 Mbps Baud Rate When Using Crystal 24 MHz Input Clock Up to 3 Mbps Baud Rate When Using

Contextual Info: TL16C752B-EP 3.3 V DUAL UART WITH 64-BYTE FIFO www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an

Contextual Info: TL16C752B-EP www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 3.3 V DUAL UART WITH 64-BYTE FIFO Check for Samples: TL16C752B-EP FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and

Contextual Info: TL16C752B-EP 3.3-V DUAL UART WITH 64-BYTE FIFO SGLS153 – FEBRUARY 2003 D Controlled Baseline D D D D D D D D D D D D D Optional Data Flow Resume by Xon Any – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C to 110°C

b0416

Abstract: B0415 T0469-01 T0467-01 ST16C2550 TL16C752B t0468 b0421 T0472-01 T0473-01
Contextual Info: TL16C752B www.ti.com SLLS405C – DECEMBER 1999 – REVISED JUNE 2010 3.3-V Dual UART With 64-Byte FIFO Check for Samples: TL16C752B FEATURES • • • 1 • • • • • • • • • • Pin Compatible With ST16C2550 With Additional Enhancements Up to 1.5 Mbps Baud Rate When Using Crystal

MS-026

Abstract: S-PQFP-G48 ST16C2550 TL16C752B-EP TL16C752BTPTREP
Contextual Info: TL16C752B-EP 3.3-V DUAL UART WITH 64-BYTE FIFO SGLS153 – FEBRUARY 2003 D Controlled Baseline D D D D D D D D D D D D D Optional Data Flow Resume by Xon Any – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –40°C to 110°C