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    AC11074

    Abstract: 74AC 74AC11074 D2957 T10064-D2957
    Contextual Info: 54AC11074, 74AC11074 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0064— D2957, DECEMBER 1986— REVISED MARCH 1990 5 4A C 11 0 74 . . . J P A C K A G E 74A C 11074 . . . D O R N PACKAGE Flow-Through Architecture to Optimize PCB


    OCR Scan     		54ac11074ti0064d2957500-ma+5300-milac1107474ac74ac11074t10064-d2957 PDF

    AC11074

    Contextual Info: 54AC11074, 74AC11074 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0064—02957, DECEMBER 1986—REVISED MARCH 1990 • Flow-Through Architecture to Optimize PCB Layout 54AC11074 . . . J PACKAGE 74AC11074 . . . O OR N PACKAGE TOP VIEW


    OCR Scan     		54ac1107474ac11074ti0064--029571986--revised+3500-ma300-milac11074 PDF

    54ACT11521

    Abstract: 74ACT11521 D2957 TI0084
    Contextual Info: 54ACT11521, 74ACT11521 8-BIT IDENTITY COMPARATORS TI0084— D2957, JULY 1987— R EVISED MARCH 1990 54ACT11521 . . . J PACKAGE 74ACT11521 . . . DW OR N PACKAGE Inputs are TTL-Voltage Compatible Compares Two 8-Bit Words TOP VIEW Flow-Through Architecture to Optimize PCB


    OCR Scan     		54act1152174actti0084d2957+3500-ma300-mil74act11521 PDF