TC74HC109A Search Results
TC74HC109A Datasheets (11)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| TC74HC109AF | Toshiba | General Purpose Logic ICs | Original | 225.03KB | 9 | ||
| TC74HC109AF | Toshiba | Japanese - General Purpose Logic ICs | Original | 295.69KB | 8 | ||
| TC74HC109AF | Toshiba | Dual J Inverted(K)Flip Flop with Preset and Clear | Scan | 286.87KB | 6 | ||
| TC74HC109AF | Toshiba | Dual J-K flip-flop with preset and clear | Scan | 281.79KB | 7 | ||
| TC74HC109AFN | Toshiba | General Purpose Logic ICs | Original | 232.92KB | 8 | ||
| TC74HC109AFN | Toshiba | Dual J Inverted(K)Flip Flop with Preset and Clear | Scan | 286.87KB | 6 | ||
| TC74HC109AFN | Toshiba | Dual J-K flip-flop with preset and clear | Scan | 281.79KB | 7 | ||
| TC74HC109AP | Toshiba | General Purpose Logic ICs | Original | 225.03KB | 9 | ||
| TC74HC109AP | Toshiba | Japanese - General Purpose Logic ICs | Original | 295.7KB | 8 | ||
| TC74HC109AP | Toshiba | Dual J-K flip-flop with preset and clear | Scan | 281.79KB | 7 | ||
| TC74HC109AP | Toshiba | Dual J Inverted(K)Flip Flop with Preset and Clear | Scan | 286.87KB | 6 |
TC74HC109A Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: -T C 7 4 H C 1 9 A P / A F / A F N D U A L J - K F L I P - F L O P W I T H PRESET A N D C L E A R T he TC74HC109A is a hig h speed CMOS J - K F L IP F L O P |
OCR Scan |
tc74hc109atc74hc109ap/af/afn | |
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Contextual Info: TOSHIBA TC74HC109AP/AF/AFN Dual J-R Flip-Flop with Preset and Clear The TC74HC109A is a high speed CMOS DUAL J-FTFUPFLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. |
OCR Scan |
tc74hc109ap/af/afntc74hc109a63mhztc74hc/hct | |
16PIN
Abstract: 74LS109 TC74HC109AF TC74HC109AFN TC74HC109AP
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OCR Scan |
tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+6 | |
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Contextual Info: Reliability Tests Report Product Name: TC74HC109AF Package Name: SOP16 1. Thermal tests Test Item Heat resistance Reflow Heat resistance (Flow) Heat resistance (Iron) Temperature cycling Test Condition Peak : 260 deg.C(a moment) Reflow zone : 230 deg.C 30 to 50 s |
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tc74hc109af | |
74LS109
Abstract: TC74HC109AF TC74HC109AFN TC74HC109AP SOL16-P
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tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+3 | |
74LS109
Abstract: TC74HC109AF TC74HC109AFN TC74HC109AP
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tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+2 | |
plji
Abstract: HC-228 HC-227 HC-226
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OCR Scan |
tc74hc109ap/af/afn--tc74hc109ahc-228tc74hc109ap/af/afn+4 | |
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Contextual Info: Reliability Tests Report Product Name: TC74HC109AP Package Name: DIP16 1. Thermal tests Test Item Heat resistance Flow Heat resistance (Iron) Temperature cycling - Test Condition Peak : 260 deg.C Immersion time : 10 s (Lead shall be immersed only under stopper) |
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tc74hc109apdip16 | |
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Contextual Info: TOSHIBA TC74HC109AP/AF/AFN TO SHIBA CM OS D IG ITAL INTEGRATED CIRCUIT SILICON M ONOLITHIC TC74HC109AP, TC74HC109AF, TC74HC109AFN DUAL J - K FLIP-FLO P WITH PRESET AND CLEAR Note The JEDEC SOP (FN) is not available in Japan The TC74HC109A is a high speed CMOS J - K FLIP FLOP |
OCR Scan |
tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+4 | |
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Contextual Info: TC74HC109AP/AF/AFN DUAL J-K F L IP -F L O P WITH PRESET AND CLEAR The TC74HC109A is a high speed CMOS J - K FL IP FLOP fabricated with silicon gate C ^ O S technology. It achieves the high speed operation sim ilar to equivalent LSTTL while m aintaining the CMOS low power |
OCR Scan |
tc74hc109ap/af/afntc74hc109atc74hc109ap/af/afn-3tc74hc109 | |
16PIN
Abstract: 74LS109 TC74HC109AF TC74HC109AFN TC74HC109AP
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OCR Scan |
tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+3 | |
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Contextual Info: TOSHIBA TC74HC109AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC109AP, TC74HC109AF, TC74HC109AFN DUAL J - K FLIP-FLOP WITH PRESET AND CLEAR Note The JEDEC SOP (FN) is not available in Japan The TC74HC109A is a high speed CMOS J - K FLIP FLOP |
OCR Scan |
tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+4 | |
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Contextual Info: TC74HC109AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC109AP,TC74HC109AF Dual J-K Flip-Flop with Preset and Clear The TC74HC109A is a high speed CMOS J- K FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent |
Original |
tc74hc109ap/aftc74hc109aptc74hc109aftc74hc109a | |
74LS109
Abstract: TC74HC109AF TC74HC109AP
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tc74hc109ap/aftc74hc109aptc74hc109aftc74hc109a+3 | |
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Contextual Info: TC74HC109AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC109AP,TC74HC109AF,TC74HC109AFN Dual J-K Flip-Flop with Preset and Clear The TC74HC109A is a high speed CMOS J- K FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent |
Original |
tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+1 | |
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Contextual Info: TOSHIBA TC74HC109AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC109AP, TC74HC109AF, TC74HC109AFN _ DUAL J - K FLIP -FLO P WITH PRESET AND CLEAR The TC74HC109A is a high speed CMOS J - K FLIP FLOP fabricated with silicon gate C2MOS technology. |
OCR Scan |
tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+4 | |
k1412Contextual Info: TOSHIBA TC74HC109AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC109AP, TC74HC109AF, TC74HC109AFN DUAL J - K FLIP-FLOP WITH PRESET AND CLEAR Note The JEDEC SOP (FN) is not available in Japan The TC74HC109A is a high speed CMOS J - K FLIP FLOP |
OCR Scan |
tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+4 | |
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Contextual Info: TC74HC109AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC109AFN Dual J-K Flip-Flop with Preset and Clear The TC74HC109A is a high speed CMOS J- K FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent |
Original |
tc74hc109afntc74hc109a | |
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Contextual Info: TC74HC109AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC109AP,TC74HC109AF Dual J-K Flip-Flop with Preset and Clear The TC74HC109A is a high speed CMOS J- K FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent |
Original |
tc74hc109ap/aftc74hc109aptc74hc109aftc74hc109a | |
6333aContextual Info: J TC74HC109AP/AF/AFN DUAL J -K F L IP - F L O P WITH PRESET AND CLEAR T h e T C 74H C109A is a h i g h sp e e d C M O S J - K F L I P F L O P f a b r i c a t e d w ith silic o n g a t e C ^ O S t e c h n o l o g y . It a c h ie v e s th e h i g h spe e d o p e r a t i o n s i m i l a r to |
OCR Scan |
tc74hc109ap/af/afnc109atc74hc109ap/af/afn-3tc74hc109ap/af/afn-4+1 | |
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Contextual Info: TOSHIBA TC74HC109AP/AF/AFN TO SHIBA CM OS D IG ITAL INTEGRATED CIRCUIT SILICON M ONOLITHIC TC74HC109AP, TC74HC109AF, TC74HC109AFN DUAL J - K FLIP-FLO P WITH PRESET AND CLEAR Note The JEDEC SOP (FN) is not available in Japan The TC74HC109A is a high speed CMOS J - K FLIP FLOP |
OCR Scan |
tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+4 | |
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Contextual Info: TC74HC109AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC109AP,TC74HC109AF,TC74HC109AFN Dual J-K Flip-Flop with Preset and Clear The TC74HC109A is a high speed CMOS J- K FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent |
Original |
tc74hc109ap/af/afntc74hc109aptc74hc109aftc74hc109afn+1 | |
PC74HC04
Abstract: PC74HC154 PC74HC191 PC74HCT541 PC74HCT245 MC74HC266 PC74HC374 PC74HCT244 PC74HCT86 PC74HC273
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OCR Scan |
tc74hc00atc74hct00atc74hc02atc74hct02a+16 | |
74ls74apc
Abstract: HD74ls04p 74LVC1G04ady8 semiconductor AZ431BZ-AE1 HCF4060BE HEF4093BP datasheet free download ne5334 hd74hc132p dm74ls47n
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74ls74apchd74ls04p74lvc1g04ady8semiconductor+6 | |