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SN74F11
|
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Texas Instruments
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Triple 3-input positive-AND gates |
Original |
PDF
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67.43KB
|
5
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SN74F112
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Texas Instruments
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Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset |
Original |
PDF
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73.06KB
|
5
|
|
SN74F112D
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Texas Instruments
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DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET |
Original |
PDF
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73.05KB
|
5
|
|
SN74F112D
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Texas Instruments
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Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SOIC 0 to 70 |
Original |
PDF
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596.63KB
|
13
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SN74F112D
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|
Unknown
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
Historical |
PDF
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35.59KB
|
1
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SN74F112D-00
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Texas Instruments
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SN74F112 - IC F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, FF/Latch |
Original |
PDF
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645.9KB
|
13
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|
SN74F112D-00R
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|
Texas Instruments
|
SN74F112 - IC F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, FF/Latch |
Original |
PDF
|
645.9KB
|
13
|
|
SN74F112DE4
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|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset |
Original |
PDF
|
317.72KB
|
9
|
|
SN74F112DE4
|
|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SOIC 0 to 70 |
Original |
PDF
|
596.63KB
|
13
|
|
SN74F112DG4
|
|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SOIC 0 to 70 |
Original |
PDF
|
596.63KB
|
13
|
|
SN74F112DR
|
|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SOIC 0 to 70 |
Original |
PDF
|
596.63KB
|
13
|
|
SN74F112DR
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Texas Instruments
|
Dual Negative Edge Triggered JK Flip-Flop with Preset and Clear |
Original |
PDF
|
73.05KB
|
5
|
|
SN74F112DRE4
|
|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SOIC 0 to 70 |
Original |
PDF
|
596.63KB
|
13
|
|
SN74F112DRE4
|
|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset |
Original |
PDF
|
317.72KB
|
9
|
|
|
|
SN74F112DRG4
|
|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-SOIC 0 to 70 |
Original |
PDF
|
596.63KB
|
13
|
|
SN74F112N
|
|
Texas Instruments
|
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET |
Original |
PDF
|
73.05KB
|
5
|
|
SN74F112N
|
|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-PDIP 0 to 70 |
Original |
PDF
|
596.63KB
|
13
|
|
SN74F112N
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|
Unknown
|
Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
Historical |
PDF
|
35.59KB
|
1
|
|
SN74F112N-10
|
|
Texas Instruments
|
SN74F112 - IC F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16, FF/Latch |
Original |
PDF
|
645.9KB
|
13
|
|
SN74F112NE4
|
|
Texas Instruments
|
Dual J-K Negative-Edge-Triggered Flip-Flop With Clear And Preset 16-PDIP 0 to 70 |
Original |
PDF
|
596.63KB
|
13
|