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    SCAS632 Search Results

    SCAS632 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    CDC921

    Abstract: CDCR83 CDCR83DBQ CDCR83DBQG4 CDCR83DBQR MO-137 CDC924
    Contextual Info: CDCR83 DIRECT RAMBUS CLOCK GENERATOR SCAS632B − APRIL 2001 − REVISED OCTOBER 2005 D 400-MHz Differential Clock Source for D D D D D D D D D Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System


    Original
    cdcr83scas632b400-mhz800-mhz+6cdc921cdcr83dbqcdcr83dbqg4cdcr83dbqrmo-137cdc924 PDF

    CDC921

    Contextual Info: CDCR83 DIRECT RAMBUS CLOCK GENERATOR SCAS632B − APRIL 2001 − REVISED OCTOBER 2005 D 400-MHz Differential Clock Source for D D D D D D D D D Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System


    Original
    cdcr83scas632b400-mhz800-mhz+1cdc921 PDF

    CDC921

    Abstract: CDC924 CDCR83 CDCR83DBQ CDCR83DBQR CDCR83DBQRG4 MO-137
    Contextual Info: CDCR83 DIRECT RAMBUS CLOCK GENERATOR SCAS632B − APRIL 2001 − REVISED OCTOBER 2005 D 400-MHz Differential Clock Source for D D D D D D D D D Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System


    Original
    cdcr83scas632b400-mhz800-mhz+6cdc921cdc924cdcr83dbqcdcr83dbqrcdcr83dbqrg4mo-137 PDF

    CDC921

    Contextual Info: CDCR83 DIRECT RAMBUS CLOCK GENERATOR SCAS632 – APRIL 2001 D 400-MHz Differential Clock Source for D D D D D D D D D Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System


    Original
    cdcr83scas632400-mhz800-mhz+3133-mhzcdc924cdc921 PDF

    CDC921

    Contextual Info: CDCR83 DIRECT RAMBUS CLOCK GENERATOR SCAS632 – DECEMBER 2000 D 533-MHz Differential Clock Source for D D D D D D D D D VDDIR REFCLK VDDP GNDP GNDI PCLKM SYNCLKN GNDC VDDC VDDIPD STOPB PWRDNB 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12


    Original
    cdcr83scas632533-mhz1066-mhz+4133-mhzcdc924cdc92hcdc921 PDF

    CDC921

    Abstract: CDC924 CDCR83 MO-137
    Contextual Info: CDCR83 DIRECT RAMBUS CLOCK GENERATOR SCAS632A – APRIL 2001 – REVISED MARCH 2002 D 400-MHz Differential Clock Source for D D D D D D D D D Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System


    Original
    cdcr83scas632a400-mhz800-mhz+3cdc921cdc924mo-137 PDF

    CDC921

    Contextual Info: CDCR83 DIRECT RAMBUS CLOCK GENERATOR SCAS632B − APRIL 2001 − REVISED OCTOBER 2005 D 400-MHz Differential Clock Source for D D D D D D D D D Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System


    Original
    cdcr83scas632b400-mhz800-mhz+2133-mhzcdc921 PDF

    CDC921

    Abstract: CDC924 CDCR83 CDCR83DBQ CDCR83DBQR CDCR83DBQRG4 MO-137
    Contextual Info: CDCR83 DIRECT RAMBUS CLOCK GENERATOR SCAS632A – APRIL 2001 – REVISED MARCH 2002 D 400-MHz Differential Clock Source for D D D D D D D D D Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System


    Original
    cdcr83scas632a400-mhz800-mhz+6cdc921cdc924cdcr83dbqcdcr83dbqrcdcr83dbqrg4mo-137 PDF

    CDC921

    Contextual Info: CDCR83 DIRECT RAMBUS CLOCK GENERATOR SCAS632B − APRIL 2001 − REVISED OCTOBER 2005 D 400-MHz Differential Clock Source for D D D D D D D D D Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System


    Original
    cdcr83scas632b400-mhz800-mhz+2133-mhzcdc921 PDF

    CDC921

    Abstract: CDC924 CDCR83 CDCR83DBQ CDCR83DBQG4 CDCR83DBQR MO-137
    Contextual Info: CDCR83 DIRECT RAMBUS CLOCK GENERATOR SCAS632B − APRIL 2001 − REVISED OCTOBER 2005 D 400-MHz Differential Clock Source for D D D D D D D D D Direct Rambus Memory Systems for an 800-MHz Data Transfer Rate Synchronizes the Clock Domains of the Rambus Channel With an External System


    Original
    cdcr83scas632b400-mhz800-mhz+6cdc921cdc924cdcr83dbqcdcr83dbqg4cdcr83dbqrmo-137 PDF