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    Contextual Info: SN74LVC112A DUAL NEGATIVE-EDGE-TRIGGERED Ü-K FLIP-FLOP WITH CLEAR AND PRESET SCAS289E - JANUARY 1 9 9 3 - REVISED JANUARY 1996 • • • • "IToIfo R PACKAGE TOP VIEW EPICrM(Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per


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    SN74LVC112A SCAS289E MIL-STD-883, JESD17 PDF