SCAS11 Search Results

Contextual Info: 74ACT11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS _ SCAS115- D3456, MARCH 1990-REVISEDAPRIL 1933 Inputs Are TTL-Voltage Compatible Independent Registers A and B Buses Multiplexed Real-Time and Stored Data Inverting Data Paths

74AC11648

Contextual Info: 74AC11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCAS114 – MARCH 1990 – REVISED APRIL 1993 • • • • • • • • DW OR NT PACKAGE TOP VIEW Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data Inverting Data Paths

74AC11013

Contextual Info: 74AC11013 DUAL 4-INPUT POSITIVE-NAND SCHMITT TRIGGER SCAS112 – MARCH 1990 – REVISED APRIL 1993 • • • • • • • • D OR N PACKAGE TOP VIEW Operation From Very Slow Edges Improved Line-Receiving Characteristics High Noise Immunity Flow-Through Architecture Optimizes PCB

Contextual Info: 74AC11153 DUAL 1ĆOFĆ4 DATA SELECTOR/MULTIPLEXER ą ăą SCAS117A − JUNE 1990 − REVISED APRIL 1993 • • • • • • • • D OR N PACKAGE TOP VIEW Permits Multiplexing From N Lines to 1 Line Performs Parallel-to-Serial Conversion Strobe (Enable) Line Provided for

74AC11648

Contextual Info: 74AC11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3ĆSTATE OUTPUTS ăą SCAS114 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • • DW OR NT PACKAGE TOP VIEW Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data

Contextual Info: 74AC11153 DUAL 1ĆOFĆ4 DATA SELECTOR/MULTIPLEXER ą ăą SCAS117A − JUNE 1990 − REVISED APRIL 1993 • • • • • • • • D OR N PACKAGE TOP VIEW Permits Multiplexing From N Lines to 1 Line Performs Parallel-to-Serial Conversion Strobe (Enable) Line Provided for

P3458

Contextual Info: 74ACT11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS _ SCAS11 5 - D3458, MARCH 1990-R EV IS ED APRIL 1993 Inputs Are TTL-Voltage Compatible DW PACKAGE TOP VIEW Independent Registers A and B Buses Multiplexed Real-Time and Stored Data

74AC11013

Contextual Info: 74AC11013 DUAL 4ĆINPUT POSITIVEĆNAND SCHMITT TRIGGER ą SCAS112 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • • D OR N PACKAGE TOP VIEW Operation From Very Slow Edges Improved Line-Receiving Characteristics High Noise Immunity Flow-Through Architecture Optimizes PCB

74AC11648

Contextual Info: 74AC11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3ĆSTATE OUTPUTS ăą SCAS114 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • • DW OR NT PACKAGE TOP VIEW Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data

74AC11132

Contextual Info: 74AC11132 QUADRUPLE 2-INPUT POSITIVE-NAND SCHMITT-TRIGGER SCAS113 – D3482, MARCH 1990 – REVISED APRIL 1993 • D OR N PACKAGE TOP VIEW Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Flow-Through Architecture Optimizes

74ACT11648

Abstract: 74ACT11648DW 74ACT11648DWR 74ACT11648NT
Contextual Info: 74ACT11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3ĆSTATE OUTPUTS ą SCAS115 − D3458, MARCH 1990 − REVISED APRIL 1993 • • • • • • • • DW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Independent Registers A and B Buses Multiplexed Real-Time and Stored Data

Contextual Info: SN74ACT7801 1024 x 18 CLOCKED FIRSTĆIN, FIRSTĆOUT MEMORY ą SCAS111 − D3489, APRIL 1990 − REVISED MAY 1991 • • • • • Member of the Texas Instruments Widebus  Family Independent Asynchronous Inputs and Outputs 1024 Words × 18 Bits Read and Write Operations Can Be

Contextual Info: 74AC11153 DUAL 1-OF-4 DATA SELECTOR/MULTIPLEXER SCAS117A – JUNE 1990 – REVISED APRIL 1993 • • • • • • • • D OR N PACKAGE TOP VIEW Permits Multiplexing From N Lines to 1 Line Performs Parallel-to-Serial Conversion Strobe (Enable) Line Provided for

Contextual Info: SN54ACT16244, 74ACT16244 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS116B – MARCH 1990 – REVISED APRIL 1996 D D D D D D D D SN54ACT16244 . . . WD PACKAGE 74ACT16244 . . . DGG OR DL PACKAGE TOP VIEW Members of the Texas Instruments Widebus Family

74AC11153

Abstract: 74AC11153D 74AC11153DR 74AC11153N
Contextual Info: 74AC11153 DUAL 1ĆOFĆ4 DATA SELECTOR/MULTIPLEXER ą ăą SCAS117A − JUNE 1990 − REVISED APRIL 1993 • • • • • • • • D OR N PACKAGE TOP VIEW Permits Multiplexing From N Lines to 1 Line Performs Parallel-to-Serial Conversion Strobe (Enable) Line Provided for

74AC11013

Abstract: 74AC11013D 74AC11013N
Contextual Info: 74AC11013 DUAL 4ĆINPUT POSITIVEĆNAND SCHMITT TRIGGER ą SCAS112 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • • D OR N PACKAGE TOP VIEW Operation From Very Slow Edges Improved Line-Receiving Characteristics High Noise Immunity Flow-Through Architecture Optimizes PCB

SN74ACT7801

Contextual Info: SN74ACT7801 1024 x 18 CLOCKED FIRSTĆIN, FIRSTĆOUT MEMORY ą SCAS111 − D3489, APRIL 1990 − REVISED MAY 1991 • • • • • Member of the Texas Instruments Widebus  Family Independent Asynchronous Inputs and Outputs 1024 Words × 18 Bits Read and Write Operations Can Be

Contextual Info: 74ACT11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3ĆSTATE OUTPUTS ą SCAS115 − D3458, MARCH 1990 − REVISED APRIL 1993 • • • • • • • • DW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Independent Registers A and B Buses Multiplexed Real-Time and Stored Data

74AC11648

Contextual Info: 74AC11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCAS114 – MARCH 1990 – REVISED APRIL 1993 • • • • • • • • DW OR NT PACKAGE TOP VIEW Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data Inverting Data Paths

Contextual Info: 74AC11153 DUAL 1ĆOFĆ4 DATA SELECTOR/MULTIPLEXER ą ăą SCAS117A − JUNE 1990 − REVISED APRIL 1993 • • • • • • • • D OR N PACKAGE TOP VIEW Permits Multiplexing From N Lines to 1 Line Performs Parallel-to-Serial Conversion Strobe (Enable) Line Provided for

74AC11013

Contextual Info: 74AC11013 DUAL 4ĆINPUT POSITIVEĆNAND SCHMITT TRIGGER ą SCAS112 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • • D OR N PACKAGE TOP VIEW Operation From Very Slow Edges Improved Line-Receiving Characteristics High Noise Immunity Flow-Through Architecture Optimizes PCB

ACT16244

Abstract: 74ACT16244 CT1624
Contextual Info: 54ACT16244, 74ACT16244 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS116 - D346S, MARCH 1990 - REVISED APRIL 1993 • Member of the Texas Instruments W idebus Family 54ACT16244 . . . WD PACKAGE 74ACT16244 . . . DGG OR DL PACKAGE • 3-State Outputs Drive Bus Lines or Buffer

P34S8

Abstract: 74ACT11648
Contextual Info: 74ACT11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCAS115 - P34S8, MARCH 1990 - REVISED APRIL 1993 Inputs Are TTL-Voltage Compatible DW PACKAGE TOP VIEW Independent Registers A and B Buses _ J — o — u G [ 1 28 ] C A B Multiplexed Real-Time and Stored Data

74AC11648

Contextual Info: 74AC11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3ĆSTATE OUTPUTS ăą SCAS114 − MARCH 1990 − REVISED APRIL 1993 • • • • • • • • DW OR NT PACKAGE TOP VIEW Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data