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Fibrain Sp zoo


Fibrain Sp zoo G-SCA-SCA-S-010.0-SX-D-18-Y Fiber patch cord; SC/APC,both sides; 10m; 9/125um; yellow; Gold
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SCAS01 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: 74ACT11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS013C – AUGUST 1987 – REVISED APRIL 1996 D D D, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted	Original	74ACT11008 SCAS013C 500-mA 300-mil 74ACT11008N 74ACT11008NSR 74ACT11008PWLE 74ACT11008PWR	PDF
Contextual Info: 74AC11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS010B – JULY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, NT, OR PW PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines Directly Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations	Original	74AC11245 SCAS010B 500-mA 300-mil	PDF
Contextual Info: 54ACT11533, 74ACT11533 OCTAL DĆTYPE TRANSPARENT LATCHES WITH 3ĆSTATE OUTPUTS ą SCAS017A − D2957, JULY 1987 − REVISED APRIL 1993 • • • • • • • • • • Eight Latches in a Single Package 3-State Bus-Driving Inverting Outputs Full Parallel Access for Loading	Original	54ACT11533, 74ACT11533 54ACT11533 74ACT11533 SCAS017A D2957, 500-mA 300-mil	PDF
D2957 Abstract: 54ACT11533 74ACT11533 ACT11373 Contextual Info: 54ACT11533, 74ACT11533 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS SCAS017A – D2957, JULY 1987 – REVISED APRIL 1993 • • • • • • • • • • Eight Latches in a Single Package 3-State Bus-Driving Inverting Outputs Full Parallel Access for Loading	Original	54ACT11533, 74ACT11533 SCAS017A D2957, 500-mA 300-mil 54ACT11533 D2957 54ACT11533 74ACT11533 ACT11373	PDF
Contextual Info: 74AC11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS01 OB - JULY 1987 - REVISED APRIL 1996 3-State Outputs Drive Bus Lines Directly DB, DW, NT, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout A1 [ 1 Center-Pin V^c and GND Configurations	OCR Scan	74AC11245 SCAS01 500-mA 300-mil	PDF
Contextual Info: 74ACT11373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS015B - JUNE 1987 - REVISED APRIL 1996 DB, DW, OR NT PACKAGE TOP VIEW • Eight Latches in a Single Package • 3-State Bus Driving True O utputs • Full Parallel Access fo r Loading •	OCR Scan	74ACT11373 SCAS015B 500-mA 300-mil	PDF
54AC11027 Abstract: 74AC11027 Contextual Info: 54AC11027, 74AC11027 TRIPLE 3-INPUT POSITIVE-NOR GATES SCAS019A – JULY 1987 – REVISED APRIL 1993 • 54AC11027 . . . J PACKAGE 74AC11027 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations	Original	54AC11027, 74AC11027 SCAS019A 54AC11027 500-mA 300-mil 54AC11027 74AC11027	PDF
Contextual Info: 54ACT11241, 74ACT11241 OCTAL BUFFERS/LINE DRIVERS WITH 3ĆSTATE OUTPUTS ą SCAS011B − D2957, JULY 1987 − REVISED APRIL 1993 • • • • • • • 54ACT11241 . . . JT PACKAGE 74ACT11241 . . . DB, DW OR NT PACKAGE 3-State Outputs Drive Bus Lines or Buffer	Original	54ACT11241, 74ACT11241 SCAS011B D2957, 54ACT11241 500-mA 300-mil	PDF
Contextual Info: 54ACT11021, 74ACT11021 DUAL 4ĆINPUT POSITIVEĆAND GATES ą ą SCAS012B − D2957, JULY 1987 − REVISED APRIL 1993 • • • • • • 54ACT11021 . . . J PACKAGE 74ACT11021 . . . D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes	Original	54ACT11021, 74ACT11021 SCAS012B D2957, 54ACT11021 500-mA 300-mil	PDF
74ACT11008 Contextual Info: 74ACT11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS013C - AUGUST 1987 - REVISED APRIL 1996 Inputs Are TTL-Voltage Compatible Center-Pin Vcc and GND Configurations Minimize High-Speed Switching Noise EPIC Enhanced-Performance Implanted CMOS 1-ii.m Process	OCR Scan	74ACT11008 SCAS013C 500-mA 300-mil 01054b3	PDF
Contextual Info: 54ACT11020, 74ACT11020 DUAL 4-INPUT POSITIVE-NAND GATES SCAS016A - D2957, JUNE 1987 - REVISED APRIL 1993 • * Inputs Are TTL-Voltage Compatible ■ ■ * Flow-Through Architecture to Optimize PCB Layout I I * Center-Pin V^c and GND Configurations to Minimize High-Speed Switching Noise	OCR Scan	54ACT11020, 74ACT11020 SCAS016A D2957, 54ACT11020. 500-mA 300-mil	PDF
Contextual Info: 54ACT11241, 74ACT11241 OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS011B - D2957, JULY 1987 - REVISED APRIL 1993 * 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers 54ACT11241 . . . JT PACKAGE 74ACT11241 . . . DB, DW OR NT PACKAGE 1	OCR Scan	54ACT11241, 74ACT11241 SCAS011B D2957, 54ACT11241 500-mA 0105Q37	PDF
Contextual Info: 74AC11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS010B – JULY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, NT, OR PW PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines Directly Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations	Original	74AC11245 SCAS010B 500-mA 300-mil /imaging/BITTING/cpl/20020930 10/TXII/09272002 HTML/74ac11245 Sep-30-2002 74AC11245, 74AC11245NT	PDF
54ACT11010 Abstract: 74ACT11010 D2957 Contextual Info: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A – D2957, JULY 1987 – REVISED APRIL 1993 • • • • Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise	Original	54ACT11010, 74ACT11010 SCAS018A D2957, 500-mA 300-mil 54ACT11010 54ACT11010 74ACT11010 D2957	PDF

Contextual Info: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise	Original	74AC11008 SCAS014C 500-mA 300-mil	PDF
74ACT11008 Abstract: 74ACT11008D 74ACT11008DR 74ACT11008N 74ACT11008NSR 74ACT11008PW 74ACT11008PWLE 74ACT11008PWR MTSS001C Contextual Info: 74ACT11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS013C – AUGUST 1987 – REVISED APRIL 1996 D D D, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted	Original	74ACT11008 SCAS013C 500-mA 300-mil 74ACT11008 74ACT11008D 74ACT11008DR 74ACT11008N 74ACT11008NSR 74ACT11008PW 74ACT11008PWLE 74ACT11008PWR MTSS001C	PDF
54AC11245 Abstract: 74AC11244 74AC11245 1L1723 Contextual Info: 54AC11245, 74AC11245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS01OA - JULY 1987 - R E V IS E D APRIL 1993 • 3-State Outputs Drive Bus Lines Directly 54AC11245 . . . JT PACKAGE 74AC11244 . . . DB, DW, NT, OR PW PACKAGE • Flow-Through Architecture Optimizes	OCR Scan	54AC11245 74AC11245 SCAS01 500-mA 300-mil 1L1723 74AC11244	PDF
74ACT11373DW Abstract: 74ACT11373DWE4 74ACT11373DWG4 74ACT11373DWR 74ACT11373 74ACT11373DBLE 74ACT11373DBR 74ACT11373DBRE4 74ACT11373DBRG4 Contextual Info: 74ACT11373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS015B – JUNE 1987 – REVISED APRIL 1996 D D D D D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Eight Latches in a Single Package 3-State Bus Driving True Outputs Full Parallel Access for Loading	Original	74ACT11373 SCAS015B 500-mA 300-mil 74ACT11373DW 74ACT11373DWE4 74ACT11373DWG4 74ACT11373DWR 74ACT11373 74ACT11373DBLE 74ACT11373DBR 74ACT11373DBRE4 74ACT11373DBRG4	PDF
74ACT11373 Abstract: 74ACT11373DBLE 74ACT11373DBR 74ACT11373DBRE4 74ACT11373DW 74ACT11373DWE4 74ACT11373DWR 74ACT11373DWRE4 74ACT11373NSR Contextual Info: 74ACT11373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS015B – JUNE 1987 – REVISED APRIL 1996 D D D D D D D D D D DB, DW, OR NT PACKAGE TOP VIEW Eight Latches in a Single Package 3-State Bus Driving True Outputs Full Parallel Access for Loading	Original	74ACT11373 SCAS015B 500-mA 300-mil 74ACT11373 74ACT11373DBLE 74ACT11373DBR 74ACT11373DBRE4 74ACT11373DW 74ACT11373DWE4 74ACT11373DWR 74ACT11373DWRE4 74ACT11373NSR	PDF
74AC11008D Abstract: 74AC11008 74AC11008DE4 74AC11008DR 74AC11008DRE4 74AC11008N 74AC11008NE4 74AC11008PWLE 74AC11008PWR Contextual Info: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise	Original	74AC11008 SCAS014C 500-mA 300-mil 74AC11008D 74AC11008 74AC11008DE4 74AC11008DR 74AC11008DRE4 74AC11008N 74AC11008NE4 74AC11008PWLE 74AC11008PWR	PDF
74ACT11008NSRE4 Abstract: 74ACT11008 74ACT11008D 74ACT11008DE4 74ACT11008DR 74ACT11008DRE4 74ACT11008N 74ACT11008NE4 74ACT11008NSR Contextual Info: 74ACT11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS013C – AUGUST 1987 – REVISED APRIL 1996 D D D, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted	Original	74ACT11008 SCAS013C 500-mA 300-mil 74ACT11008 74ACT11008NSRE4 74ACT11008D 74ACT11008DE4 74ACT11008DR 74ACT11008DRE4 74ACT11008N 74ACT11008NE4 74ACT11008NSR	PDF
Contextual Info: 74AC11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS010B – JULY 1987 – REVISED APRIL 1996 D D D D D D DB, DW, NT, OR PW PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines Directly Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations	Original	74AC11245 SCAS010B 500-mA 300-mil	PDF
Contextual Info: 74AC11008 QUADRUPLE 2-INPUT POSITIVE-AND GATE SCAS014C – AUGUST 1987 – REVISED APRIL 1996 D D D D D D, N, OR PW PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise	Original	74AC11008 SCAS014C 500-mA 300-mil	PDF
Contextual Info: 54ACT11533, 74ACT11533 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS SCAS017A – D2957, JULY 1987 – REVISED APRIL 1993 • • • • • • • • • • Eight Latches in a Single Package 3-State Bus-Driving Inverting Outputs Full Parallel Access for Loading	Original	54ACT11533, 74ACT11533 SCAS017A D2957, 500-mA 300-mil 54ACT11533 74ACT11533	PDF

SCAS01 Search Results

SCAS01 Equivalents

SCAS01 Price and Stock

Fibrain Sp zoo G-SCA-SCA-S-010.0-SX-D-18-Y

SCAS01 Datasheets Context Search

D2957

54AC11027

74ACT11008

54ACT11010

74ACT11008

54AC11245

74ACT11373DW

74ACT11373

74AC11008D

74ACT11008NSRE4