S92LV Search Results

Contextual Info: S92LV2421 ,S92LV2422 D S 92LV2421/D S92LV2422 10 to 75 MHz, 24-bit Channel Link II Serializer and Deserializer Te x a s In s t r u m e n t s Literature Number: SN LS321A N a t i o n a l D S92 L V 2 4 2 1/D S 92 LV2422 Q w Semiconductor 10 to 75 M Hz, 2 4 -b it C hannel Link II S e ria lize r and

AN-808

Abstract: DS92LV090A DS92LV090ATVEH
Contextual Info: + & National PRELIMINARY Semiconductor July 1998 O / CO N> o tn ro CO o o CO ë S92LV090A 9 Channel Bus LVDS Transceiver o > CO General Description Features The D S92LV090A is one in a series o f transceivers designed specifically for the high speed, low pow er proprietary b ack­

ma27q

Contextual Info: S e m i c o n d u c t o r S92LV222A General Description Features The S92LV222A is a re pe a ler designed specifically lo r the bridging ol m ultiple backplanes in a rack. The D S92LV222A utilizes low voltage differential signaling to d e live r high speed

DS92LV1224

Abstract: DS92LV1210 DS92LV1212A DS92LV1260 SCAN921224 SCAN921226 SCAN921260 SCAN926260 SCAN928028
Contextual Info: S C A N9 28 02 8 D S 9 2 LV 1 2 1 0 , D S 9 2 LV 1 2 1 2 A , D S92LV 1224, SCAN921224, SCAN921226, D S 9 2 L V 1260, SCAN921260, or SCAN926260 D eserializers

Contextual Info: Semiconductor S92LV1212 16-40 MHz 10-Bit Bus LVDS Random Lock Deserializer with Embedded Clock Recovery G eneral D escription F eatu res The S92LV1212 is an upgrade of th e D S92LV1210. It maintains all of the features of the S92LV1210 w ith the a d ­

BT 1840 PA

Abstract: DS92LV18 X1CA PRBS15 LM283 a71 sot23-6 LMH6714 BT-656 CLC001 DS15BA101
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DS92LV1021

Abstract: DS92LV1210 MSA28 JRC 062
Contextual Info: PRELIMINARY Semiconductor S eptem ber 1998 S92LV1021 and S92LV1210 16-40 MHz 10 Bit Bus LVDS Serializer and Deserializer General Description The S92LV1021 transform s a 10-bit w ide parallel C M O S/ TTL data bus into a single high speed Bus LVDS serial data

SMD SOT23 7E

Abstract: MOSFET BA7 SMD SOT23 A9 SOT23-5 SAL js7f FPD87370 LM331 smd RLM-63 SAs SOT23 SOT23 M7
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DS92LV1021

Abstract: DS92LV1210 MSA28 deutsch rsm 07 deutsch rsm connector
Contextual Info: + & National Semiconductor PRELIMINARY July 1998 O / CO o General Description due to charged cable conditions. The S92LV1021 output pins may be TRI-STATE to achieve a high im pedance state. The PLL can lock to frequencies between 16 MHz and 40 MHz.

LM655

Abstract: DS92LV18 LMH6639 LMH6714 BT-656 CLC001 DS15BA101 DS90C241 LM7372 Video cvbs out
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Contextual Info: a t i o n a l S e m i c o n d u c t o r S eptem ber 1998 S92LV1021 and S92LV1210 16-40 MHz 10 Bit Bus LVDS Serializer and Deserializer General Description The S92LV1021 transform s a 10-bit w ide parallel C M O S/ T T L data bus into a single high speed Bus LVDS serial data

BP11

Abstract: DS92LV1021 DS92LV1210 MSA28
Contextual Info: May 1998 S92LV1021 and S92LV1210 16-40 MHz 10 Bit Bus LVDS Serializer and Deserializer General Description The S92LV1021 transform s a 10-bit w ide parallel C M O S/ TTL data bus into a single high speed Bus LVDS serial data stream with em bedded clock. Th e S92LV1210 receives the

062 JRC

Abstract: JRC 062 PTRN DS92LV1021 DS92LV1210 MSA28
Contextual Info: & Semiconductor S92LV1021 and S92LV1210 16-40 MHz 10 Bit Bus LVDS Serializer and Deserializer General Description The S92LV1021 transform s a 10-bit w ide parallel C M O S/ TTL data bus into a single high speed Bus LVDS serial data stream with em bedded clock. Th e S92LV1210 receives the

S100-11

Contextual Info: + PRELIMINARY July 1998 S92LV090A General Description Feat ures The S92LV090A is one in a series of transceivers designed specifically for the high speed, low power proprietary back­ plane or cable interfaces. The device operates from a single 3.3V power supply and includes nine differential line drivers

5054D

Contextual Info: a t i o n a l S e m i c o n d u c t o r S92LV090A 9 Channel Bus LVDS Transceiver General Description Features The D S 92 L V 0 90 A is one in a series of Bus LVDS tra n sce iv­ ers designed specifically fo r the high speed, low pow er pro­ prietary backplane o r cable interfaces. The device operates