PDU53 Search Results

PDU53

Abstract: TAIS SMD PDU53-100 PDU53-1000 PDU53-200 PDU53-250 PDU53-400 PDU53-500 PDU53-750
Contextual Info: PDU53 data 3 delay devices, inc. 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU53 FEATURES • • • • •  PACKAGES Digitally programmable in 8 delay steps Monotonic delay-versus-address variation Precise and stable delays Input & outputs fully 100K-ECL interfaced & buffered

TAIS SMD

Abstract: PDU53 PDU53-100 PDU53-1000 PDU53-200 PDU53-250 PDU53-400 PDU53-500 PDU53-750 Data Delay Devices
Contextual Info: PDU53 data 3  delay devices, inc. 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU53 FEATURES • • • • • PACKAGES Digitally programmable in 8 delay steps Monotonic delay-versus-address variation Precise and stable delays Input & outputs fully 100K-ECL interfaced & buffered

Contextual Info: PDU53 data delay devices,vinc 3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE SERIES PDU53 FEATURES PACKAGES N/C N/C N/C N/C N/C N/C ^ 16 □ IN 15 □ A2 14 □ A1 13 □ LU LU GND OUT C1 c2 c3 c4 c5 c6 > Digitally programmable in 8 delay steps Monotonie delay-versus-address variation

Contextual Info: Features: • 3 -B IT P rog ram m able ■ A c c u rate T im in g ■ C om p letely 10 0 K ECL interfaced Specifications: ■ Input signal: 100K ECL load. Logic 1 vo ltag e = 1.165V min. Logic 0 vo ltag e = 1.475V max. Logic 1 cu rren t = 350 |xa max. Logic 0 cu rren t = 350 ^ a max.

PDU-53-200

Abstract: PDU-53-2000 PDU-53-250 PDU-53-2500 PDU-53-400 PDU-53-500 PDU-53-750
Contextual Info: Programmable Delay Lines S ER IES : PDU-53 1 0 0 K E C L Interfaced 3 BIT 16 Pins DIP Features: • 3 -B IT P rog ram m able ■ A ccu rate T im in g ■ C o m pletely 10OK ECL interfaced Specifications: ■ In p u t s ig n a l: 1 0 0 K E C L load . L o g ic 1 v o lta g e =

Contextual Info: Programmable Delay Lines PDU-53 S ER IES : 1 0 0 K E C L Interfaced 3 BIT 16 Pins DIP Features: • 3-B IT Program m able ■ Accurate Tim ing ■ Completely 100K ECL Interfaced Specifications: ■ M in. inp u t p u lse w id th : 3 ns or 15% of total delay w hichever is greater.

312F

Contextual Info: Timing Definition For Programmable Delay Lines PDU’s Typical Set-Up Specifications Minimum Input Pulse-Width (ns) Minimum Input Period (ns) T sua (ns) ^SUE (ns) Too (ns) ‘Absolute •Suggested Recommended PDU-13F PDU-14F PDU-15F PDU-16F PDU-17F PDU-18F

Mdu 1517

Abstract: IC 8783 N
Contextual Info: data delay devieesYinc. Table of Contents Page C o m p a n y P r o f i l e .In s id e F ro n t C o v e r D C E le c tric a l C h a r a c t e r is t ic s . P ro d u c t S e l e c t i o n . 1

Contextual Info: Timing Definition For Programmable Delay Lines PDU’s Typical Set-Up Specifications f DO (ns) M inim um Input Pulso-W idth (ns) ‘ A bsolute •Suggested R ecom m ended M inim um Input Period (ns) 6 5.5 10% of T dt 2 X PW IN 9 9 8% of T dt 8% o l T dt

PDU-1316 Series Programmable Delay Units

Contextual Info: ìFast Logic Multiple Digital SERIES: MDU-38F Delay Units 8 pins DIP T T L Interfaced Features: • Auto-insertable. ■ Completely interfaced for TTL & DTL application. ■ P.C. board space economy achieved. ■ Fits standard 8 pins DIP socket. ■ 3 equal delay units/package.

Contextual Info: Programmable Delay Lines PDU-53 S ER IES : 10 0 K E C L Interfaced 3 BIT 16 Pins DIP Features: • 3-B IT Program m able ■ Accurate Tim ing ■ Completely 100K ECL Interfaced Specifications: ■ M in. in p u t p ulse w id th : 3 ns or 15 % of total delay w hichever is greater.

Contextual Info: MILITARY PRODUCTS Most of Data Delay Devices digital delay line products are available in military version. They are identified as follows: PWC-30 Example: M C3 Series Pulse Width Military Unit_ Case Dimensions The Military Delay Line Products Feature The Following:

PDU-53-100

Abstract: PDU-53-200 PDU-53-250 PDU-53-400 PDU-53-500 PDU-53-750 ecl100
Contextual Info: Programmable Delay Lines SERIES: PO U-53 100K ECL Interfaced 3 BIT 16 Pins DIP Features: • 3-B IT Programmable ■ Accurate Tim ing ■ Completely 100K ECL Interfaced Specifications: ■ Min. input pulse width: 3 ns or 15% of total delay whichever is greater.

Contextual Info: MILITARY PRODUCTS Most of Data Delay Devices digital delay line products are available in military version. They are identified as follows: Example: PWC-30 35 M C3 Series Pulse Width. Military Unit_ Case Dimensions The Military Delay Line Products Feature The Following:

pin IC 8783 n

Contextual Info: data delay devicesTinc. Table of Contents Page Page Company P r o file . Inside Front Cover Product S e le c tio n .1 List By , 3

Contextual Info: Test Set-Up And Wave Forms Passive Delay Line Active Delay Une H -CMOS ( c o n tin u e d n e x t p ag e ) 3 Mt. Prospect Avenue, Clifton, New Jersey 07013 • (973) 773-2299 ■ Fax (973) 773-9672 4 Active Delay Line (TTL) W A V E FO R M Active Delay Line (ECL)

Contextual Info: M ILITARY PRODUCTS Most of Data Delay Devices digital delay line products are available in military version. They are identified as follows: < I/-. ‘ ^I: '? Suriw . ’ *. ^ • to w - » 1t £ 3 —1 The Military Delay Line Products Feature The Following:

Contextual Info: Programmable Delay Lines SERIES: PDU-53 1 0 0 K E C L Interfaced 3 BIT 16 Pins DIP Features: • 3-BIT Programmable ■ Accurate Timing ■ Completely 1 0 0 K ECL Interfaced Specifications: ■ Min. input pulse width: 3 ns or 15% of total delay whichever is greater.

PDU-13256 Series Programmable Delay Units

Abstract: DDU-4 Series Digital Delay Units DDU-11 Series Programmable Delay Units
Contextual Info: data \ delay ^O/ deVlcesYin»: THE SOllRtE Programmable Passive data W delay \ü / devieesYinc. GENERAL INFO RM ATIO N ORDER INFORMATION: COMPANY PROFILE DATA DELAY DEVICES, INC. was founded in 1964 with the goal of becom ing a major supplier of delay line

Contextual Info: Programmable Delay Lines PDU-53 SERIES: 100K E C L Interfaced 3 BIT 16 Pins DIP Features: • 3-B IT Programm able ■ Accurate Tim ing ■ Completely 100K ECL Interfaced Specifications: ■ Min. input pulse w idth: 3 ns or 15% of total delay whichever is greater.

Contextual Info: Programmable Delay Lines SERIES: PDU-53 100K ECL Interfaced 3 BIT 16 Pins DIP Features: • 3-BIT Programmable ■ Accurate Timing ■ Completely 1 0 0 K ECL Interfaced Specifications: ■ Min. input pulse width: 3 ns or 15% of total delay whichever is greater.

Mdu 1517

Abstract: 1519 Series smd 312F
Contextual Info: dataYgy delay No / devicesYinc. Table of Contents Page Company P ro file .Inside Front Cover Product Selection. 1 List By F unctio

Contextual Info: Programmable Delay Lines SERIES: PDII-53 100K ECL Interfaced 3 BIT] 16 Pins DIP Features: • 3-B IT Programm able ■ Accurate Tim ing ■ Com pletely 100K ECL Interfaced Specifications: ■ Min. input pulse width: 3 ns or 15% of total delay whichever is greater.

Contextual Info: Timing Definition For Programmable Delay Lines PDU’s Typical Set-Up Specifications Minimum Input Pulse-Width (ns) “Suggested Recommended Minimum Input Period (ns) 10% o f T dt 25% o f T dt G reater than T dt 2 X PW |N 8% o f T dt 8% o f T dt 2 0% of T dt