PDSP16 Search Results

PDSP16256

Abstract: PDSP16350 PDSP16510A
Contextual Info: PDSP16256/A Programmable FIR Filter DS3709 Features ● ● ● ● ● ● ● Sixteen MACs in a Single Device Basic Mode is 16-Tap Filter at up to 25MHz Sample Rates Programmable to give up to 128 Taps with Sampling Rates Proportionally Reducing to 3•125MHz

Contextual Info: W tflGEC PLESSEY P R E L IM IN A R Y IN F O R M A T IO N DS3708 - 2.0 PDSP16318/PDSP16318A COMPLEX ACCUMULATOR The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz

3B DAV

Abstract: PDSP16256 PDSP16330 PDSP16350 PDSP16510 PDSP16510A PDSP16540
Contextual Info: PDSP16510A PDSP16510A Stand Alone FFT Processor DS3475 The PDSP16510 performs Forward or Inverse Fast Fourier Transforms on complex or real data sets containing up to 1024 points. Data and coefficients are each represented by 16 bits, with block floating point arithmetic for increased

D3318

Abstract: direct pm modulation circuit PDSP16350 PDSP16488A PDSP16510A COS10
Contextual Info: PDSP16350 PDSP16350 I/Q Splitter/NCO Supersedes version in December 1993 Digital Video & DSP IC Handbook, HB3923-1 The PDSP16350 provides an integrated solution to the need for very accurate, digitised, sine and cosine waveforms. Both these waveforms are produced simultaneously, with 16

Contextual Info: • MJESSEY S E M IC O N D U C T O R S PDSP16256 / A PROGRAMMABLE FIR FILTER S U P E R S E D E S M A R C H 1990 ED ITIO N The PDSP16256/A contains sixteen multiplier - accumu­ lators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. It accepts 16 bit data and coefficients,

Contextual Info: M JE S S E Y SEMICONDUCTORS _ PDSP16340 POLAR TO CARTESIAN CONVERTER SUPERSEDES APRIL 1990 EDITION The PDSP16340 can be configured to perform either a coordinate conversion function, or simply to provide a sine / cosine look-up table. When employed as an coordinate con­

COS10

Abstract: PDSP16350 PDSP16488A PDSP16510A DIN24 PDSP16256/A
Contextual Info: PDSP16350 PDSP16350 I/Q Splitter/NCO DS3711 The PDSP16350 provides an integrated solution to the need for very accurate, digitised, sine and cosine waveforms. Both these waveforms are produced simultaneously, with 16 bit amplitude accuracy, and are synthesised using a 34 bit

GG 26

Contextual Info: @M ITEL PDSP1601/PDSP1601A ALU and Barrel Shifter SE M IC O N D U C T O R Supersedes version in December 1993 Digital Video & DSP IC Handbook, HB3923-1 The PDSP1601 is a high perform ance 16-bit arithm etic logic unit with an independent on-chip 16-bit barrel shifter.

Contextual Info: • MARCHI 990 MÆSSEY S E IV! I C O I M D U C T O R S P D S P 1 6 2 5 6 / A PROGRAMMABLE FIR FILTER Supersedes July 1989 Edition The PDSP16256 contains sixteen multiplier - accumula­ tors, which can be multi cycled to provide from 16 to 128 stages of digital filtering. It accepts 16 bit data and coefficients,

VES0010

Contextual Info: M IT E L PDSP16256/A Programmable FIR Filter SE M IC O N D U C T O R Supersedes version DS3709 5.1 January 1998 T h e P D S P 1 6 2 5 6 c o n ta in s s ix te e n m u ltip lie r accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are

pin diagram of full adder using Multiplexer IC

Abstract: full adder 2 bit ic ALU of 4 bit adder and subtractor "Overflow detection" AC84
Contextual Info: |y |^ ^ L PDSP16318/PDSP16318A _ Complex Accumulator S E M IC O N D U C T O R A, . , A dvance Inform ation Supersedes version in Decem ber 1993 Digital Video & DSP IC Handbook, HB3923-1

Contextual Info: P D S P 1601 /P D S P 1601 A MITEL ALU and Barrel Shifter SEMICONDUCTOR Supersedes version DS3705 - 2.3 September 1996 DS3705 - 3.0 The PDSP1601 is a high performance 16-bit arithmetic logic unit with an independent on-chip 16-bit barrel shifter. The PDSP1601A has two operating modes giving 20MHz or

DS3922

Contextual Info: I V II T E L . P D S P 1 6 5 1 5 A _ Stand Alone FFT Processor SEMICONDUCTOR |nformatjon DS3922 - 1.5 October 1996 The PDSP16515A perform s Forward or Inverse Fast Fourier Transforms on complex or real data sets containing up to 1024 points. Data and coefficient input are both represented

Contextual Info: P D S P 1 6 5 1 0 A @ M ITEL Stand Alone FFT Processor S E M IC O N D U C T O R Supersedes version in Decem ber 1993 Digital Video & DSP IC Handbook, HB3923-1 The PDSP16510 performs Forward or Inverse Fast Fourier Transforms on complex or real data sets containing up

AN59

Abstract: PDSP1601 PDSP16116 PDSP16116A PDSP16318 Application of dsp in sonar for m.sc i-C4H10
Contextual Info: AN59 A High Resolution FFT Processor Application Note AN59 ISSUE 2.0 July 1993 The PDSP16116A has been designed with an integral Block Floating Point system which can be used, in conjunction with other Zarlink Semiconductor PDSP parts, to process FFTs with a combination of speed and accuracy previously unobtainable. All the

Contextual Info: PDSP16116/A/MC PDSP16116/A/MC 16 By 16 Bit Complex Multiplier DS3858 - 3.0 June 2000 The PDSP16116A will multiply two complex 16 + 16 bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The

PDSP16116

Abstract: PDSP16318 PDSP16330 PDSP16340 PDSP16510 PDSP16520 PDSP16540 5BFT PDSP16510 timing
Contextual Info: • PLE8SEY ADVANCE INFORMATION SEM ICO N DU CTO RS PDSP16540 32K BUCKET BUFFER The PDSP16540 Bucket Buffer is for use in systems which require a reservoir in which a block of data is accumulated, whilst previous data is being transferred to other system elements and then processed. It thus prevents the loss of

parallel Multiplier Accumulator based on Radix-2

Abstract: DS3707 PDSP16116 PDSP16116A PDSP16318A subtractor using TTL CMOS GG144 4 bit binary full adder and subtractor 32-bit adder block diagram for barrel shifter
Contextual Info: PDSP16116 16 X 16 Bit Complex Multiplier Supersedes October 1996 version, DS3707 - 4.2 The PDSP16116 contains four 16316 array multipliers, two 32-bit adder/subtractors and all the control logic required to support Block Floating Point Arithmetic as used in FFT applications.

Contextual Info: AB37 AB37 Increase the performance of the PDSP16510 Application Brief AB37 ISSUE 1.0 February 1994 BACKGROUND A single PDSP16510 FFT Processor ,using a 40 MHz system clock, will support sampling rates up to 12.3 MHz when doing 256 point complex transforms, and up to 6.8 MHz when doing 1024 point complex transforms. These rates can be increased to

AN171

Contextual Info: AN171 AN171 Digital Filtering using the PDSP16256 Application Note AN171 - 1.0 July 1995 INTRODUCTION In the field of high performance filtering, engineering solutions are making increasing use of digital techniques. Digital filters are known to typically offer improved accuracy, complete predictability,

variable length fft processor

Abstract: 1Kx32
Contextual Info: AB35 AB35 Implementing Large and Non-Standard Transforms Application Brief AB35 - 1.0 February 1994 BACKGROUND The PDSP16510 is a stand-alone FFT Processor which performs 16, 64, 256, or 1024 point FFT's with input sampling rates of up to 40MHz - typically an order of magnitude faster than programmable DSP parts. A single device can window and transform

4x4 bit multipliers

Abstract: AC84 JAN1997 PDSP16488 PDSP16488A 8x4 ram chips
Contextual Info: PDSP16488A MA PDSP16488A MA Single Chip 2D Convolver with Integral Line Delays Supersedes January 1997 version, DS3742 - 3.1 DS3742 - 5.0 November 2000 The PDSP16488A is a fully integrated, application specific, image processing device. It performs a two dimensional

ALU of 4 bit adder and subtractor

Abstract: MIL-883 PDSP16116 PDSP16116A PDSP16318 logic diagram to setup adder and subtractor using
Contextual Info: PDSP16116/A/MC PDSP16116/A/MC 16 by 16 Bit Complex Multiplier DS3858 The PDSP16116A will multiply two complex 16 + 16 bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The data format is fractional two's complement.

PDSP1631B

Abstract: "Overflow detection"
Contextual Info: P LESSEY SEMICONDUCTORS 1 2E » 18 7220513 DOIQOTH fl • / PRELIMINARY INFORMATION »!■■»■ m."- . . . T - ll- H P L E S S E Y Sem iconductors PDSP16318/PDSP16318A COMPLEX ACCUMULATOR The PDSP16318 co n ta in s tw o inde pen den t 20-bit Adder/S ubtractors com bined w ith accum ulator registers