NM59C11 Search Results

Contextual Info: NM59C11 National ÆM Semiconductor NM59C11 1024-Bit Serial EEPROM 64 x 16-Bit or 128 x 8-Bit Configurable with Programming Status General Description Features The NM59C11 is 1024 bits of CMOS non-volatile electrically erasable memory organized as either 64 16-bit registers or

NM59C11

Abstract: CSSK M08A NM59C11EM8 NM59C11EN NM59C11M8 NM59C11N NM93C46A
Contextual Info: October 1992 NM59C11 1024-Bit Serial EEPROM 64 x 16-Bit or 128 x 8-Bit Configurable with Programming Status General Description Features The NM59C11 is 1024 bits of CMOS non-volatile electrically erasable memory organized as either 64 16-bit registers or as 128 8-bit registers. The organization is determined by the

AN-758

Abstract: C1995 NM93C06 NM93C46 NM93C56 NM93C66 an-758 national TL 11169
Contextual Info: National Semiconductor Application Note 758 Paul Lubeck April 1991 National Semiconductor manufactures a wide range of low density serial EEPROMs that use the MICROWIRE interface as a means of communication Although all of these devices use the MICROWIRE interface there are slight variations in

national semiconductor cmos

Abstract: AN-822 C1995 MM74HC4051 NM24C02 NM24C04 NM24C08 NM24C16 AN-822 national
Contextual Info: TABLE OF CONTENTS 10 COMPARING SERIAL EEPROM INTERFACE STANDARDS 20 I2CTM BUS MEMORY SIZE 21 I2C Bus Concept 22 EEPROM Memory on the I2C Bus 23 Bank Switching I2C EEPROMs 30 ACCESSING SERIAL EEPROMs 31 I2C System 3 1 1 Random Read 3 1 2 Sequential Read 3 1 3 Current Address Read

AN-822

Abstract: MM74HC4051 NM24C16 NM24CXX
Contextual Info: TABLE OF CONTENTS 1.0 COMPARING SERIAL EEPROM INTERFACE STANDARDS 2.0 I2C BUS MEMORY SIZE 3.2 MICROWIRE™ Systems 3.2.1 Read Mode 3.2.2 Sequential Read 3.2.3 Write Mode 2.1 I2C Bus Concept 3.2.4 Typical Twp vs Maximum Twp 2.2 EEPROM Memory on the I2C Bus

NMC9306

Abstract: COP822C COP642C COP820C COP840C COP842C COP920C COP922C COP940C COP620C
Contextual Info: COP620C COP622C COP640C COP642C COP820C COP822C COP840C COP842C COP920C COP922C COP940C COP942C 8-Bit Microcontroller Y General Description Y The COP820C and COP840C are members of the COP8TM microcontroller family They are fully static parts fabricated using double-metal silicon gate microCMOS technology

Contextual Info: AN-758 Fairchild A , V Using Fairchild’s MICROWIRE EEPROM C. 1.3 NM93CS Family D. 1.4 NM93CxxA Family The NM93C family of EEPROM, like all of Fairchild's serial EEPROMs have a basic level of write protection that can be turned on or off by the use of the ERASE/WRITE DISABLE EWDS and

NM59C11

Abstract: AN-758 NM93C06 NM93C46 NM93C56 NM93C66
Contextual Info: Fairchild Semiconductor manufactures a wide range of low density serial EEPROMs that use the MICROWIRE interface as a means of communication. Although all of these devices use the MICROWIRE interface, there are slight variations in interfacing due to differences in memory sizes, features, and

NM59C11

Abstract: NM24C16
Contextual Info: Fairchild Application Note 822 Sean Long March 1997 TABLE OF CONTENTS 1.0 COMPARING SERIAL EEPROM 3.1.6 Typical Twr vs Maximum Twr 3.2 MICROWIRE Systems 3.2.1 Read Mode INTERFACE STANDARDS I2C™ BUS MEMORY SIZE I2C Bus Concept EEPROM Memory on the I2C Bus

AN-758

Abstract: NM93C06 NM93C46 NM93C56 NM93C66
Contextual Info: AN-758 Using Fairchild’s MICROWIRE EEPROM Fairchild Application Note 758 Fairchild Semiconductor manufactures a wide range of low density serial EEPROMs that use the MICROWIRE interface as a means of communication. Although all of these devices use the

NMC9306

Contextual Info: AN-758 Using National’s MICROWIRE EEPROM National Semiconductor Application Note 758 Paul Bryant National Semiconductor manufactures a wide range of low density serial EEPROMs that use the MICROWIRE interface as a means of communication. Although all of these devices

Contextual Info: s e m ic o n d u c t o r TABLE OF CONTENTS COMPARING SERIAL EEPROM INTER­ FACE STANDARDS 2.0 l2C BUS MEMORY SIZE 3.2.3 Write Mode 2.1 l2C Bus Concept 3.2.4 Typical Twp vs Maximum Twp 3.2.1 Read Mode 3.2.2 Sequential Read 2.2 EEPROM Memory on the l2C Bus